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fix(native): store the mask plane of wide two-state values - #2425
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mergify[bot] merged 1 commit intoOct 28, 2026
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On the native x86 and arm64 backends, a store wider than 64 bits into a
4-state variable wrote its mask plane only when the source register had
wide mask chunks. A wide register loaded from a 2-state variable, or
produced by a 2-state operation, has at most a scalar mask, so the
destination kept a stale mask and read back as X or Z.
This showed up in 4-state simulation of a concatenation assignment from a
2-state value wider than 64 bits in a process, `{x, y, z} = w`: the value
is captured in a 4-state temporary and its slices are assigned, so the
targets read 0 (or X for 4-state targets), while Cranelift and wasm gave
the right values. The store now always writes every mask bit: the source's
wide mask chunks when it has them, otherwise its scalar mask for the low
chunk and zero above.
Change-Id: If46d411b2f1bc2e1aa4f99f79033b09df4e11067
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On the native x86 and arm64 backends, a store wider than 64 bits into a
4-state variable wrote its mask plane only when the source register had
wide mask chunks. A wide register loaded from a 2-state variable, or
produced by a 2-state operation, has at most a scalar mask, so the
destination kept a stale mask and read back as X or Z.
This showed up in 4-state simulation of a concatenation assignment from a
2-state value wider than 64 bits in a process,
{x, y, z} = w: the valueis captured in a 4-state temporary and its slices are assigned, so the
targets read 0 (or X for 4-state targets), while Cranelift and wasm gave
the right values. The store now always writes every mask bit: the source's
wide mask chunks when it has them, otherwise its scalar mask for the low
chunk and zero above.