Issues

• sel: chip-typed and conventional references are typed never for designators above 40 (e.g. sel.U501(Chip))

  tscircuit/core#4913 · Filter by author gekkom opened on Oct 25, 2026

• fabricatorPreset picks the first JLC stackup when several constructions match (4-layer 1.0 mm: 1080/2116/3313/7628)

  tscircuit/core#4890 · Filter by author gekkom opened on Oct 24, 2026
  1

• Default solder paste aperture is 0.7x the pad (49% of its area)

  tscircuit/core#4800 · Filter by author DurandA opened on Oct 20, 2026

• "trace is missing a name" warning for traces made by connections={...}, which can't be named

  tscircuit/core#4774 · Filter by author osholt opened on Oct 18, 2026

• KiCad footprints whose courtyard is four line segments fail the placement check and skip autorouting for the whole board

  tscircuit/core#4772 · Filter by author osholt opened on Oct 18, 2026

• Saved fanout paths (<fanout pcbTracePaths>) + routeRemaining crash TopologyMergingSolver at the escaped pad

  tscircuit/core#4663 · Filter by author PaulBichl opened on Oct 15, 2026
  1

• Dogbone fanout crashes with a copper pour on an escaped net: "Dogbone connection ... has no source pad"

  tscircuit/core#4660 · Filter by author PaulBichl opened on Oct 15, 2026
  1

• Feature request: a post-routing hook so user code can add or adjust footprint copper after autorouting

  tscircuit/core#4629 · Filter by author raykholo opened on Oct 14, 2026
  1

• 3D model and KiCad footprint origin snap to the copper bounding-box centre, not the footprint origin (circle smtpads move it, polygon smtpads don't)

  tscircuit/core#4628 · Filter by author raykholo opened on Oct 14, 2026
  1

• Wild trace jumps in infgrid-ijump-astar (MultilayerIjump overshoots goal when wallDistance === Infinity)

  tscircuit/core#4585 · Filter by author Mxtl7 opened on Oct 12, 2026
  3

• Through-hole via components omit inner-layer source and PCB ports

  tscircuit/core#4530 · Filter by author 0hmX opened on Oct 11, 2026
  1

• Circuit JSON import fails for native testpoints: missing simple_test_point inflator

  tscircuit/core#4525 · Filter by author 0hmX opened on Oct 11, 2026
  1

• Saved autorouting paths reject SMD top-layer branch nodes, and the suggested autorouter="fanout" does not fix it

  tscircuit/core#4481 · Filter by author superfansizhe-beep opened on Oct 9, 2026
  1

• schPinArrangement drops pcb_port links for pins with multiple pads (plated holes left floating, no error)

  tscircuit/core#4354 · Filter by author aliforever opened on Oct 3, 2026
  1

• Ignore unowned top-level traces when generating unrouted SRJ

  tscircuit/core#4154 · Filter by author ShiboSoftwareDev opened on Sep 25, 2026

• <constraint yDist edgeToEdge> uses the wrong Y offset and can overlap footprint primitives

  tscircuit/core#4101 · Filter by author kavyabhand opened on Sep 23, 2026

• pack-applied rotation does not propagate to pcb_plated_hole.ccw_rotation (hand-written pcbRotation does)

  tscircuit/core#4021 · Filter by author Isaac-Fate opened on Sep 19, 2026
  2

• SCHEMATIC_COMPONENT_OUTLINE_COLOR "rgba(132, 0, 0)" is not portable SVG color; strict SVG renderers reject schematic output

  tscircuit/core#3982 · Filter by author raykholo opened on Sep 16, 2026

• MultilayerIjump (infgrid-ijump-astar 0.0.35) emits jumps mirrored away from the goal; fix + repro on a fork since tscircuit/autorouting is archived

  tscircuit/core#3927 · Filter by author twzrd-sol opened on Sep 13, 2026
  5

• pcbPath chooses top when a plated-hole start connects to an explicit bottom via port

  tscircuit/core#3906 · Filter by author raykholo opened on Sep 12, 2026
  1

• Add global board viaTenting prop with per-via overrides, mask rendering and exports

  tscircuit/core#3903 · Filter by author raykholo opened on Sep 12, 2026
  1

• Standalone vias incorrectly require component courtyards and emit empty footprint references

  tscircuit/core#3902 · Filter by author raykholo opened on Sep 12, 2026
  1

• Small polygon and circular cutouts can disappear from routing obstacles

  tscircuit/core#3734 · Filter by author yathanshgaba opened on Sep 8, 2026
  1

• Scientific notation is truncated in simulation graph scale and offset settings

  tscircuit/core#3732 · Filter by author yathanshgaba opened on Sep 8, 2026

• Legacy schematic start contact suppresses later crossing markers

  tscircuit/core#3729 · Filter by author yathanshgaba opened on Sep 8, 2026