cse332

Here are 8 public repositories matching this topic...

prantoamt / 16bit_processor_design

processor-architecture cpu mips simulation processor cse mips-assembly hardware-designs computer-architecture mips-assembler logisim mips-language mips-architecture mips-processor mips-simulator computer-design-and-implementation cse332

Updated Dec 30, 2018

IAFahim / CSE332

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North South University - Computer Organization and Architecture

nsu cse332 north-south-university

Updated May 24, 2022

WinTer1165 / CSE332-MIPS-CPU-Design-and-Testing

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This is NSU CSE332 course's project that starts with learning about ISA, assembly language, advanced ALU, data path and control, pipelining in theory.

mips-assembly verilog modelsim mips32 nsu verilog-project cse332 northsouthuniversity cse332-project

Updated May 2, 2025
Verilog

jaimaSad23 / Verilog_Assignment_CSE332L

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In CSE332L: Computer Organization and Architecture Lab, I completed an assignment involving several Verilog tasks, where I solved the problems using behavioral, dataflow, and gate-level modeling.

assignment verilog computer-architecture vlsi cse332 behavioral-modeling gatelevel cse332-project dataflow-model spring2026

Updated Apr 26, 2026
Verilog

TimeWithPotato / CSE332-TNF-Project

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20-bit CPU | CSE332 | NSU | North South University | Computer Architecture Project

mips logisim mips-architecture mips-processor mips-instructions mips-simulator nsu cse332 computer-organisation-architechure north-south-university nsu-cse mips-project mips-projects cse332-project

Updated Dec 30, 2024
Python

jaimaSad23 / MIPS_Processor_Inspired_16bit_R_and_I_type_dataflow_project

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I have built a R-type and I-type datapath for a 16-bit system in logisim, featuring 16 bit data, 4-bit addressing (16 registers) and 16-bit instructions, where the ALU is capable of performing 8 operations. More descriptions are written inside the file