Fix RISC-V inline ASM `clobber_abi` when extra target features are enabled by beetrees · Pull Request #163833 · rust-lang/rust

beetrees · 2026-10-05T18:01:21Z

Waiting on #163839, a beta-backportable subset of this PR.

This PR fixes several issues with clobber_abi("C") on RISC-V:

Whether to clobber the registers for ilp32e/lp64e or not was previously decided based on whether the e target feature was enabled, as opposed to the actual ABI in use.
ilp32e/lp64e failed to clobber all floating point registers and the upper integer registers as specified in the ABI specification. As a side effect of fixing this, x16-x31 can now be used as clobbers when the e feature is enabled (as RISC-V inline ASM is stable, I think this might require a FCP?).
Callee-saved floating point registers are only callee-saved up to ABI_FLEN bits; the rest of the register is considered temporary. As LLVM doesn't support partial register clobbers, this requires the callee-saved floating point registers to be clobbered.

rustbot · 2026-10-05T18:01:28Z

r? @mu001999

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RalfJung · 2026-10-05T19:02:58Z

+                    Ok(if matches!(target.llvm_abiname, LlvmAbi::Ilp32e | LlvmAbi::Lp64e) {
+                        InlineAsmClobberAbi::RiscVE
+                    } else {
+                        InlineAsmClobberAbi::RiscV
+                    })


So if "e" gets disabled on these targets, we should still use the RiscVE clobbers?

View changes since the review

Yes. The ilp32e/lp64e ABIs clobber different registers from the other ABIs (specifically, x18-x27 are clobbered by ilp32e/lp64e but not be ilp32/lp64).

Amanieu · 2026-10-05T20:39:09Z

+                    // Only ABI_FLEN bits of the callee-saved floating point registers are
+                    // preserved. As LLVM doesn't have partial clobbers, this means we have to
+                    // clobber the callee-saved floating point registers as well as the temporary
+                    // registers.


Could we instead have 3 variants of the clobber ABI:

RiscVE where upper X registers and all FP registers are clobbered

RiscV where all FP regsiters are clobbered.

RiscVD where only caller-saved FP registers are clobbered.

View changes since the review

Done, although it will need updating once support for the q extension is added to LLVM.

Would it make sense to add that ABI to the enum to bug! if it gets hit and we forget to update?

It's not the lp64q ABI that would cause the issue: LLVM understanding how to use the 128-bit FLEN from the q target feature and the q feature being enabled (either via -Ctarget-feature/-Zllvm-target-feature or in C code that has the feature enabled and is LTOed to the Rust code) would make the ABI_FLEN==FLEN assumption invalid. LLVM currently only has assembler support for q, so this is not yet an issue.

mu001999 · 2026-10-08T12:04:18Z

r? Amanieu

Amanieu · 2026-10-28T23:47:23Z

r=me once #163839 lands and this is rebased

…abled

beetrees · 2026-11-01T00:20:46Z

@bors r=Amanieu rollup

rust-bors · 2026-11-01T00:20:49Z

📌 Commit 930372b has been tentatively approved by Amanieu

It will be put into the queue for this repository once PR CI succeeds.

Rollup of 10 pull requests Successful merges: - #160186 (Implement `Fn` traits for safe functions of any ABI) - #160370 (rustdoc: notable trait badge and popover enhancements) - #165077 (Fix alloctests for panic=abort) - #163623 (Make docblock `<code>` elements inline so they behave better) - #163833 (Fix RISC-V inline ASM `clobber_abi` when extra target features are enabled) - #165067 (cg_llvm: Use an invariant lifetime brand for LLVM modules ) - #165227 (Respect `--color=never` when printing `--explain` output to the terminal) - #165254 (Cleanup `rustdoc-html` tests) - #165258 (impl Eq for AllocRange) - #165259 (rustc-dev-guide subtree update)

Rollup merge of #163833 - beetrees:fix-riscv-clobber-abi, r=Amanieu Fix RISC-V inline ASM `clobber_abi` when extra target features are enabled Waiting on #163839, a beta-backportable subset of this PR. This PR fixes several issues with `clobber_abi("C")` on RISC-V: - Whether to clobber the registers for `ilp32e`/`lp64e` or not was previously decided based on whether the `e` target feature was enabled, as opposed to the actual ABI in use. - `ilp32e`/`lp64e` failed to clobber all floating point registers and the upper integer registers as specified in the ABI specification. As a side effect of fixing this, `x16`-`x31` can now be used as clobbers when the `e` feature is enabled (as RISC-V inline ASM is stable, I think this might require a FCP?). - Callee-saved floating point registers are only callee-saved up to ABI_FLEN bits; the rest of the register is considered temporary. As LLVM doesn't support partial register clobbers, this requires the callee-saved floating point registers to be clobbered.

Rollup of 10 pull requests Successful merges: - rust-lang/rust#160186 (Implement `Fn` traits for safe functions of any ABI) - rust-lang/rust#160370 (rustdoc: notable trait badge and popover enhancements) - rust-lang/rust#165077 (Fix alloctests for panic=abort) - rust-lang/rust#163623 (Make docblock `<code>` elements inline so they behave better) - rust-lang/rust#163833 (Fix RISC-V inline ASM `clobber_abi` when extra target features are enabled) - rust-lang/rust#165067 (cg_llvm: Use an invariant lifetime brand for LLVM modules ) - rust-lang/rust#165227 (Respect `--color=never` when printing `--explain` output to the terminal) - rust-lang/rust#165254 (Cleanup `rustdoc-html` tests) - rust-lang/rust#165258 (impl Eq for AllocRange) - rust-lang/rust#165259 (rustc-dev-guide subtree update)

beetrees added A-inline-assembly Area: Inline assembly (`asm!(…)`) beta-nominated Nominated for backporting to the compiler in the beta channel. O-riscv Target: RISC-V architecture labels Oct 5, 2026

rustbot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. labels Oct 5, 2026

rustbot assigned mu001999 Oct 5, 2026

beetrees mentioned this pull request Oct 5, 2026

Tracking Issue for riscv_target_feature #150257

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beetrees force-pushed the fix-riscv-clobber-abi branch from e0c4734 to 4c968c7 Compare October 5, 2026 18:23

RalfJung reviewed Oct 5, 2026

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beetrees removed the beta-nominated Nominated for backporting to the compiler in the beta channel. label Oct 5, 2026

beetrees marked this pull request as draft October 5, 2026 19:42

rustbot added S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. and removed S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. labels Oct 5, 2026

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beetrees force-pushed the fix-riscv-clobber-abi branch from 4c968c7 to 94d4660 Compare October 5, 2026 23:09

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Fix RISC-V inline ASM clobber_abi when extra target features are en…

930372b

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beetrees force-pushed the fix-riscv-clobber-abi branch from 94d4660 to 930372b Compare November 1, 2026 00:14

beetrees marked this pull request as ready for review November 1, 2026 00:17

rustbot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. and removed S-waiting-on-author Status: This is awaiting some action (such as code changes or more information) from the author. labels Nov 1, 2026

rust-bors Bot added the S-waiting-on-bors Status: Waiting on bors to run and complete tests. Bors will change the label on completion. label Nov 1, 2026

rust-bors Bot removed the S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. label Nov 1, 2026

jhpratt mentioned this pull request Nov 1, 2026

Rollup of 10 pull requests #165264

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rust-bors Bot merged commit 4cf06e0 into rust-lang:main Nov 1, 2026
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rustbot added this to the 1.101.0 milestone Nov 1, 2026

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Fix RISC-V inline ASM `clobber_abi` when extra target features are enabled - #163833

Fix RISC-V inline ASM `clobber_abi` when extra target features are enabled#163833
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