Issues

• Price the HiSparse sparse-decode path: indexer top-K selection and GPU<->host page transfer

  hisparse-support
  inference-sim/blis-latency-kernel#98 · Filter by author susiejojo opened on Oct 29, 2026

• Refuse engine rules whose release differs from Scenario.EngineVersion

  inference-sim/blis-latency-kernel#95 · Filter by author namasl opened on Oct 28, 2026

• Score agentic_traces workloads (currently single_turn-only), unblocking current-gen models

  inference-sim/blis-latency-kernel#79 · Filter by author susiejojo opened on Oct 20, 2026
  4

• Price drafter-specific DP padding in speculative batches

  inference-sim/blis-latency-kernel#77 · Filter by author namasl opened on Oct 20, 2026

• Do not emit loadable non-speculative scenarios for Eagle3 measurements

  inference-sim/blis-latency-kernel#74 · Filter by author namasl opened on Oct 20, 2026
  1

• DeepEP follow-ups: eager-measured LL/v2 floors, LL receive tensor not in the activation peak, HT comm SMs not withheld, no cross-node EP16 data

  muse-spark-accuracy
  inference-sim/blis-latency-kernel#72 · Filter by author sriumcp opened on Oct 18, 2026
  1

• Block-scaled FP8 GEMMs are priced on the generic FP8 ramp (gemm_*_fp8_block never read), and small-M FP8 is ~2x too fast on H100

  inference-sim/blis-latency-kernel#71 · Filter by author sriumcp opened on Oct 18, 2026

• HBM term needs a size-dependent per-launch floor (t = t0 + bytes / (BwPeak x hbm_derate)), refitted jointly with host_launch_per_kernel

  inference-sim/blis-latency-kernel#70 · Filter by author sriumcp opened on Oct 18, 2026

• TTFT low on short turns behind long cached contexts (Kimi-K3, DeepSeek-V4.1): engine cost not yet separated

  inference-sim/blis-latency-kernel#68 · Filter by author sriumcp opened on Oct 18, 2026

• DeepSeek-V4.1 saturation collapse at H100 TP8 c28 / H200 TP4 c64 is not reproduced (measured decode 7.8 tok/s per request, BLIS ~420 tok/s aggregate)

  inference-sim/blis-latency-kernel#69 · Filter by author sriumcp opened on Oct 18, 2026

• Kimi-K2.5 int4 (compressed-tensors WNA16 g32) routed experts priced on the BF16 ramp; vLLM v0.31.0 runs Marlin W4A16

  inference-sim/blis-latency-kernel#67 · Filter by author sriumcp opened on Oct 18, 2026

• Unguarded properties (SP-on mHC sharding, drafter ceiling with prefill rows) and the DecodeThreshold = 1 + K contract

  inference-sim/blis-latency-kernel#66 · Filter by author sriumcp opened on Oct 16, 2026

• Parallel-block drafter: the eager context store is decided on unpadded rows; vLLM uses the padded graph's rows

  inference-sim/blis-latency-kernel#65 · Filter by author sriumcp opened on Oct 16, 2026

• Custom all-reduce vs NCCL is inert: the collective lane is not keyed by the resolved backend

  inference-sim/blis-latency-kernel#63 · Filter by author sriumcp opened on Oct 16, 2026
  1

• async_scheduling is resolved but never priced: true and false give identical step times

  inference-sim/blis-latency-kernel#60 · Filter by author sriumcp opened on Oct 16, 2026
  1

• h100 dense decode TPOT priced high by a near-constant offset, larger at low TP (Prism Llama-70B, approximate anchors)

  inference-sim/blis-latency-kernel#58 · Filter by author sriumcp opened on Oct 15, 2026

• vLLM v0.31.0 fidelity follow-ups from #44: Engram prefetch overlap, eager dispatch, breakable capture for DSA, rules-layer refusals

  inference-sim/blis-latency-kernel#49 · Filter by author sriumcp opened on Oct 14, 2026
  2

• Routed-expert FLOPs under TP: one composition across ramps (the native-ramp over-charge)

  inference-sim/blis-latency-kernel#47 · Filter by author sriumcp opened on Oct 14, 2026

• Price non-gated (relu2) experts once blis-schemas can state them (remainder of #26)

  inference-sim/blis-latency-kernel#45 · Filter by author sriumcp opened on Oct 14, 2026

• TierTime prices only O_DIRECT I/O; vLLM's buffered fallback for the filesystem offload tier is not priced

  enhancement
  inference-sim/blis-latency-kernel#41 · Filter by author sriumcp opened on Oct 13, 2026
  1