From def707d626aa59eefcb4ca67ad37d7a41db1f7a6 Mon Sep 17 00:00:00 2001 From: Eliot Yoon Date: Fri, 23 Oct 2026 09:58:26 +0000 Subject: [PATCH] simx: reject LMEM configurations that are rejected in RTL VX_mem_unit.sv statically rejects two LMEM sizes: one that the LMEM base address is not a multiple of, and, with WGMMA, one above 64 KB, the most the 16-bit smem descriptor offset can address. SimX did not do this, so it built and ran configurations such as VX_CFG_LMEM_LOG_SIZE > 16. On xlen32 this caused silent failures. At LMEM_LOG_SIZE=17, CTA slots above 64 KB start at 0xFFFF0000 + 64 KB, which wraps to 0x0000xxxx. Those CTAs' shared-memory traffic lands on the console rings and the exit-code word. sgemm2 still reports PASSED but prints garbage and half of its LMEM requests leave LMEM. rtlsim correctly fails to run. SimX now mirrors all four VX_mem_unit LMEM asserts as static_asserts in the Core constructor so an invalid configuration fails to build. --- sim/simx/core.cpp | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/sim/simx/core.cpp b/sim/simx/core.cpp index ec729d83e3..78b9171a66 100644 --- a/sim/simx/core.cpp +++ b/sim/simx/core.cpp @@ -124,6 +124,15 @@ class Core::Impl { mem_coalescers_.at(b) = MemCoalescer::Create(sname, LSU_CHANNELS, DCACHE_CHANNELS, DCACHE_WORD_SIZE, LSU_QUEUE_OUT_SIZE, 1); } + #ifdef VX_CFG_TCU_WGMMA_ENABLE + static_assert(VX_CFG_LMEM_ENABLED, "TCU_WGMMA_ENABLE requires LMEM_ENABLE"); + static_assert(VX_CFG_LMEM_LOG_SIZE <= 16, "LMEM exceeds the 16-bit smem descriptor offset field"); + #endif + #ifdef VX_CFG_LMEM_ENABLE + static_assert(0 == ((uint64_t(1) << VX_CFG_LMEM_LOG_SIZE) % VX_CFG_MEM_BLOCK_SIZE), "LMEM size must be a multiple of MEM_BLOCK_SIZE"); + static_assert(0 == (uint64_t(VX_MEM_LMEM_BASE_ADDR) % (uint64_t(1) << VX_CFG_LMEM_LOG_SIZE)), "LMEM base address must be aligned to the LMEM size"); + #endif + // create local memory. // The DXA writes and the TCU tile-buffer reads share the row-wide DMA // port, DXA first.