diff --git a/go.mod b/go.mod index 4da832a9..f00776a9 100644 --- a/go.mod +++ b/go.mod @@ -10,7 +10,7 @@ require ( github.com/mitchellh/mapstructure v1.5.0 github.com/rs/zerolog v1.35.1 github.com/spf13/cobra v1.10.2 - github.com/spf13/pflag v1.0.10 + github.com/spf13/pflag v1.1.0 github.com/spf13/viper v1.21.0 github.com/stretchr/testify v1.12.1 github.com/whilp/git-urls v1.0.0 diff --git a/go.sum b/go.sum index 0b8c87a8..775f5fd5 100644 --- a/go.sum +++ b/go.sum @@ -110,8 +110,8 @@ github.com/spf13/cast v1.10.0/go.mod h1:jNfB8QC9IA6ZuY2ZjDp0KtFO2LZZlg4S/7bzP6qq github.com/spf13/cobra v1.10.2 h1:DMTTonx5m65Ic0GOoRY2c16WCbHxOOw6xxezuLaBpcU= github.com/spf13/cobra v1.10.2/go.mod h1:7C1pvHqHw5A4vrJfjNwvOdzYu0Gml16OCs2GRiTUUS4= github.com/spf13/pflag v1.0.9/go.mod h1:McXfInJRrz4CZXVZOBLb0bTZqETkiAhM9Iw0y3An2Bg= -github.com/spf13/pflag v1.0.10 h1:4EBh2KAYBwaONj6b2Ye1GiHfwjqyROoF4RwYO+vPwFk= -github.com/spf13/pflag v1.0.10/go.mod h1:McXfInJRrz4CZXVZOBLb0bTZqETkiAhM9Iw0y3An2Bg= +github.com/spf13/pflag v1.1.0 h1:6W6MbVUrnMb8PEhjkqwsVLY7ryuzRfFHF4mQd7L94ag= +github.com/spf13/pflag v1.1.0/go.mod h1:McXfInJRrz4CZXVZOBLb0bTZqETkiAhM9Iw0y3An2Bg= github.com/spf13/viper v1.21.0 h1:x5S+0EU27Lbphp4UKm1C+1oQO+rKx36vfCoaVebLFSU= github.com/spf13/viper v1.21.0/go.mod h1:P0lhsswPGWD/1lZJ9ny3fYnVqxiegrlNrEmgLjbTCAY= github.com/stretchr/objx v0.1.0/go.mod h1:HFkY916IF+rwdDfMAkV7OtwuqBVzrE8GR6GFx+wExME= diff --git a/vendor/github.com/klauspost/cpuid/v2/.gitignore b/vendor/github.com/klauspost/cpuid/v2/.gitignore deleted file mode 100644 index daf913b1..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/.gitignore +++ /dev/null @@ -1,24 +0,0 @@ -# Compiled Object files, Static and Dynamic libs (Shared Objects) -*.o -*.a -*.so - -# Folders -_obj -_test - -# Architecture specific extensions/prefixes -*.[568vq] -[568vq].out - -*.cgo1.go -*.cgo2.c -_cgo_defun.c -_cgo_gotypes.go -_cgo_export.* - -_testmain.go - -*.exe -*.test -*.prof diff --git a/vendor/github.com/klauspost/cpuid/v2/.goreleaser.yml b/vendor/github.com/klauspost/cpuid/v2/.goreleaser.yml deleted file mode 100644 index 1b695b62..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/.goreleaser.yml +++ /dev/null @@ -1,57 +0,0 @@ -version: 2 - -builds: - - - id: "cpuid" - binary: cpuid - main: ./cmd/cpuid/main.go - env: - - CGO_ENABLED=0 - flags: - - -ldflags=-s -w - goos: - - aix - - linux - - freebsd - - netbsd - - windows - - darwin - goarch: - - 386 - - amd64 - - arm64 - goarm: - - 7 - -archives: - - - id: cpuid - name_template: "cpuid-{{ .Os }}_{{ .Arch }}{{ if .Arm }}v{{ .Arm }}{{ end }}" - format_overrides: - - goos: windows - format: zip - files: - - LICENSE -checksum: - name_template: 'checksums.txt' -changelog: - sort: asc - filters: - exclude: - - '^doc:' - - '^docs:' - - '^test:' - - '^tests:' - - '^Update\sREADME.md' - -nfpms: - - - file_name_template: "cpuid_package_{{ .Os }}_{{ .Arch }}{{ if .Arm }}v{{ .Arm }}{{ end }}" - vendor: Klaus Post - homepage: https://github.com/klauspost/cpuid - maintainer: Klaus Post - description: CPUID Tool - license: BSD 3-Clause - formats: - - deb - - rpm diff --git a/vendor/github.com/klauspost/cpuid/v2/CONTRIBUTING.txt b/vendor/github.com/klauspost/cpuid/v2/CONTRIBUTING.txt deleted file mode 100644 index 2ef4714f..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/CONTRIBUTING.txt +++ /dev/null @@ -1,35 +0,0 @@ -Developer Certificate of Origin -Version 1.1 - -Copyright (C) 2015- Klaus Post & Contributors. -Email: klauspost@gmail.com - -Everyone is permitted to copy and distribute verbatim copies of this -license document, but changing it is not allowed. - - -Developer's Certificate of Origin 1.1 - -By making a contribution to this project, I certify that: - -(a) The contribution was created in whole or in part by me and I - have the right to submit it under the open source license - indicated in the file; or - -(b) The contribution is based upon previous work that, to the best - of my knowledge, is covered under an appropriate open source - license and I have the right under that license to submit that - work with modifications, whether created in whole or in part - by me, under the same open source license (unless I am - permitted to submit under a different license), as indicated - in the file; or - -(c) The contribution was provided directly to me by some other - person who certified (a), (b) or (c) and I have not modified - it. - -(d) I understand and agree that this project and the contribution - are public and that a record of the contribution (including all - personal information I submit with it, including my sign-off) is - maintained indefinitely and may be redistributed consistent with - this project or the open source license(s) involved. diff --git a/vendor/github.com/klauspost/cpuid/v2/LICENSE b/vendor/github.com/klauspost/cpuid/v2/LICENSE deleted file mode 100644 index 5cec7ee9..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/LICENSE +++ /dev/null @@ -1,22 +0,0 @@ -The MIT License (MIT) - -Copyright (c) 2015 Klaus Post - -Permission is hereby granted, free of charge, to any person obtaining a copy -of this software and associated documentation files (the "Software"), to deal -in the Software without restriction, including without limitation the rights -to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -copies of the Software, and to permit persons to whom the Software is -furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice shall be included in all -copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -SOFTWARE. - diff --git a/vendor/github.com/klauspost/cpuid/v2/README.md b/vendor/github.com/klauspost/cpuid/v2/README.md deleted file mode 100644 index 88d68d52..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/README.md +++ /dev/null @@ -1,512 +0,0 @@ -# cpuid -Package cpuid provides information about the CPU running the current program. - -CPU features are detected on startup, and kept for fast access through the life of the application. -Currently x86 / x64 (AMD64/i386) and ARM (ARM64) is supported, and no external C (cgo) code is used, which should make the library very easy to use. - -You can access the CPU information by accessing the shared CPU variable of the cpuid library. - -Package home: https://github.com/klauspost/cpuid - -[![PkgGoDev](https://pkg.go.dev/badge/github.com/klauspost/cpuid)](https://pkg.go.dev/github.com/klauspost/cpuid/v2) -[![Go](https://github.com/klauspost/cpuid/actions/workflows/go.yml/badge.svg)](https://github.com/klauspost/cpuid/actions/workflows/go.yml) - -## installing - -`go get -u github.com/klauspost/cpuid/v2` using modules. -Drop `v2` for others. - -Installing binary: - -`go install github.com/klauspost/cpuid/v2/cmd/cpuid@latest` - -Or download binaries from release page: https://github.com/klauspost/cpuid/releases - -### Homebrew - -For macOS/Linux users, you can install via [brew](https://brew.sh/) - -```sh -$ brew install cpuid -``` - -## example - -```Go -package main - -import ( - "fmt" - "strings" - - . "github.com/klauspost/cpuid/v2" -) - -func main() { - // Print basic CPU information: - fmt.Println("Name:", CPU.BrandName) - fmt.Println("PhysicalCores:", CPU.PhysicalCores) - fmt.Println("ThreadsPerCore:", CPU.ThreadsPerCore) - fmt.Println("LogicalCores:", CPU.LogicalCores) - fmt.Println("Family", CPU.Family, "Model:", CPU.Model, "Vendor ID:", CPU.VendorID) - fmt.Println("Features:", strings.Join(CPU.FeatureSet(), ",")) - fmt.Println("Cacheline bytes:", CPU.CacheLine) - fmt.Println("L1 Data Cache:", CPU.Cache.L1D, "bytes") - fmt.Println("L1 Instruction Cache:", CPU.Cache.L1I, "bytes") - fmt.Println("L2 Cache:", CPU.Cache.L2, "bytes") - fmt.Println("L3 Cache:", CPU.Cache.L3, "bytes") - fmt.Println("Frequency", CPU.Hz, "hz") - - // Test if we have these specific features: - if CPU.Supports(SSE, SSE2) { - fmt.Println("We have Streaming SIMD 2 Extensions") - } -} -``` - -Sample output: -``` ->go run main.go -Name: AMD Ryzen 9 3950X 16-Core Processor -PhysicalCores: 16 -ThreadsPerCore: 2 -LogicalCores: 32 -Family 23 Model: 113 Vendor ID: AMD -Features: ADX,AESNI,AVX,AVX2,BMI1,BMI2,CLMUL,CMOV,CX16,F16C,FMA3,HTT,HYPERVISOR,LZCNT,MMX,MMXEXT,NX,POPCNT,RDRAND,RDSEED,RDTSCP,SHA,SSE,SSE2,SSE3,SSE4,SSE42,SSE4A,SSSE3 -Cacheline bytes: 64 -L1 Data Cache: 32768 bytes -L1 Instruction Cache: 32768 bytes -L2 Cache: 524288 bytes -L3 Cache: 16777216 bytes -Frequency 0 hz -We have Streaming SIMD 2 Extensions -``` - -# usage - -The `cpuid.CPU` provides access to CPU features. Use `cpuid.CPU.Supports()` to check for CPU features. -A faster `cpuid.CPU.Has()` is provided which will usually be inlined by the gc compiler. - -To test a larger number of features, they can be combined using `f := CombineFeatures(CMOV, CMPXCHG8, X87, FXSR, MMX, SYSCALL, SSE, SSE2)`, etc. -This can be using with `cpuid.CPU.HasAll(f)` to quickly test if all features are supported. - -Note that for some cpu/os combinations some features will not be detected. -`amd64` has rather good support and should work reliably on all platforms. - -Note that hypervisors may not pass through all CPU features through to the guest OS, -so even if your host supports a feature it may not be visible on guests. - -## arm64 feature detection - -Not all operating systems provide ARM features directly -and there is no safe way to do so for the rest. - -Currently `arm64/linux` and `arm64/freebsd` should be quite reliable. -`arm64/darwin` adds features expected from the M1 processor, but a lot remains undetected. - -A `DetectARM()` can be used if you are able to control your deployment, -it will detect CPU features, but may crash if the OS doesn't intercept the calls. -A `-cpu.arm` flag for detecting unsafe ARM features can be added. See below. - -Note that currently only features are detected on ARM, -no additional information is currently available. - -## flags - -It is possible to add flags that affects cpu detection. - -For this the `Flags()` command is provided. - -This must be called *before* `flag.Parse()` AND after the flags have been parsed `Detect()` must be called. - -This means that any detection used in `init()` functions will not contain these flags. - -Example: - -```Go -package main - -import ( - "flag" - "fmt" - "strings" - - "github.com/klauspost/cpuid/v2" -) - -func main() { - cpuid.Flags() - flag.Parse() - cpuid.Detect() - - // Test if we have these specific features: - if cpuid.CPU.Supports(cpuid.SSE, cpuid.SSE2) { - fmt.Println("We have Streaming SIMD 2 Extensions") - } -} -``` - -## commandline - -Download as binary from: https://github.com/klauspost/cpuid/releases - -Install from source: - -`go install github.com/klauspost/cpuid/v2/cmd/cpuid@latest` - -### Example - -``` -λ cpuid -Name: AMD Ryzen 9 3950X 16-Core Processor -Vendor String: AuthenticAMD -Vendor ID: AMD -PhysicalCores: 16 -Threads Per Core: 2 -Logical Cores: 32 -CPU Family 23 Model: 113 -Features: ADX,AESNI,AVX,AVX2,BMI1,BMI2,CLMUL,CLZERO,CMOV,CMPXCHG8,CPBOOST,CX16,F16C,FMA3,FXSR,FXSROPT,HTT,HYPERVISOR,LAHF,LZCNT,MCAOVERFLOW,MMX,MMXEXT,MOVBE,NX,OSXSAVE,POPCNT,RDRAND,RDSEED,RDTSCP,SCE,SHA,SSE,SSE2,SSE3,SSE4,SSE42,SSE4A,SSSE3,SUCCOR,X87,XSAVE -Microarchitecture level: 3 -Cacheline bytes: 64 -L1 Instruction Cache: 32768 bytes -L1 Data Cache: 32768 bytes -L2 Cache: 524288 bytes -L3 Cache: 16777216 bytes - -``` -### JSON Output: - -``` -λ cpuid --json -{ - "BrandName": "AMD Ryzen 9 3950X 16-Core Processor", - "VendorID": 2, - "VendorString": "AuthenticAMD", - "PhysicalCores": 16, - "ThreadsPerCore": 2, - "LogicalCores": 32, - "Family": 23, - "Model": 113, - "CacheLine": 64, - "Hz": 0, - "BoostFreq": 0, - "Cache": { - "L1I": 32768, - "L1D": 32768, - "L2": 524288, - "L3": 16777216 - }, - "SGX": { - "Available": false, - "LaunchControl": false, - "SGX1Supported": false, - "SGX2Supported": false, - "MaxEnclaveSizeNot64": 0, - "MaxEnclaveSize64": 0, - "EPCSections": null - }, - "Features": [ - "ADX", - "AESNI", - "AVX", - "AVX2", - "BMI1", - "BMI2", - "CLMUL", - "CLZERO", - "CMOV", - "CMPXCHG8", - "CPBOOST", - "CX16", - "F16C", - "FMA3", - "FXSR", - "FXSROPT", - "HTT", - "HYPERVISOR", - "LAHF", - "LZCNT", - "MCAOVERFLOW", - "MMX", - "MMXEXT", - "MOVBE", - "NX", - "OSXSAVE", - "POPCNT", - "RDRAND", - "RDSEED", - "RDTSCP", - "SCE", - "SHA", - "SSE", - "SSE2", - "SSE3", - "SSE4", - "SSE42", - "SSE4A", - "SSSE3", - "SUCCOR", - "X87", - "XSAVE" - ], - "X64Level": 3 -} -``` - -### Check CPU microarch level - -``` -λ cpuid --check-level=3 -2022/03/18 17:04:40 AMD Ryzen 9 3950X 16-Core Processor -2022/03/18 17:04:40 Microarchitecture level 3 is supported. Max level is 3. -Exit Code 0 - -λ cpuid --check-level=4 -2022/03/18 17:06:18 AMD Ryzen 9 3950X 16-Core Processor -2022/03/18 17:06:18 Microarchitecture level 4 not supported. Max level is 3. -Exit Code 1 -``` - - -## Available flags - -### x86 & amd64 - -| Feature Flag | Description | -|--------------------|------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------| -| ADX | Intel ADX (Multi-Precision Add-Carry Instruction Extensions) | -| AESNI | Advanced Encryption Standard New Instructions | -| AMD3DNOW | AMD 3DNOW | -| AMD3DNOWEXT | AMD 3DNowExt | -| AMXBF16 | Tile computational operations on BFLOAT16 numbers | -| AMXINT8 | Tile computational operations on 8-bit integers | -| AMXFP16 | Tile computational operations on FP16 numbers | -| AMXFP8 | Tile computational operations on FP8 numbers | -| AMXCOMPLEX | Tile computational operations on complex numbers | -| AMXTILE | Tile architecture | -| AMXTF32 | Matrix Multiplication of TF32 Tiles into Packed Single Precision Tile | -| AMXTRANSPOSE | Tile multiply where the first operand is transposed | -| APX_F | Intel APX | -| AVX | AVX functions | -| AVX10 | If set the Intel AVX10 Converged Vector ISA is supported | -| AVX10_128 | If set indicates that AVX10 128-bit vector support is present | -| AVX10_256 | If set indicates that AVX10 256-bit vector support is present | -| AVX10_512 | If set indicates that AVX10 512-bit vector support is present | -| AVX2 | AVX2 functions | -| AVX512BF16 | AVX-512 BFLOAT16 Instructions | -| AVX512BITALG | AVX-512 Bit Algorithms | -| AVX512BW | AVX-512 Byte and Word Instructions | -| AVX512CD | AVX-512 Conflict Detection Instructions | -| AVX512DQ | AVX-512 Doubleword and Quadword Instructions | -| AVX512ER | AVX-512 Exponential and Reciprocal Instructions | -| AVX512F | AVX-512 Foundation | -| AVX512FP16 | AVX-512 FP16 Instructions | -| AVX512IFMA | AVX-512 Integer Fused Multiply-Add Instructions | -| AVX512PF | AVX-512 Prefetch Instructions | -| AVX512VBMI | AVX-512 Vector Bit Manipulation Instructions | -| AVX512VBMI2 | AVX-512 Vector Bit Manipulation Instructions, Version 2 | -| AVX512VL | AVX-512 Vector Length Extensions | -| AVX512VNNI | AVX-512 Vector Neural Network Instructions | -| AVX512VP2INTERSECT | AVX-512 Intersect for D/Q | -| AVX512VPOPCNTDQ | AVX-512 Vector Population Count Doubleword and Quadword | -| AVXIFMA | AVX-IFMA instructions | -| AVXNECONVERT | AVX-NE-CONVERT instructions | -| AVXSLOW | Indicates the CPU performs 2 128 bit operations instead of one | -| AVXVNNI | AVX (VEX encoded) VNNI neural network instructions | -| AVXVNNIINT8 | AVX-VNNI-INT8 instructions | -| AVXVNNIINT16 | AVX-VNNI-INT16 instructions | -| BHI_CTRL | Branch History Injection and Intra-mode Branch Target Injection / CVE-2022-0001, CVE-2022-0002 / INTEL-SA-00598 | -| BMI1 | Bit Manipulation Instruction Set 1 | -| BMI2 | Bit Manipulation Instruction Set 2 | -| CETIBT | Intel CET Indirect Branch Tracking | -| CETSS | Intel CET Shadow Stack | -| CLDEMOTE | Cache Line Demote | -| CLMUL | Carry-less Multiplication | -| CLZERO | CLZERO instruction supported | -| CMOV | i686 CMOV | -| CMPCCXADD | CMPCCXADD instructions | -| CMPSB_SCADBS_SHORT | Fast short CMPSB and SCASB | -| CMPXCHG8 | CMPXCHG8 instruction | -| CPBOOST | Core Performance Boost | -| CPPC | AMD: Collaborative Processor Performance Control | -| CX16 | CMPXCHG16B Instruction | -| EFER_LMSLE_UNS | AMD: =Core::X86::Msr::EFER[LMSLE] is not supported, and MBZ | -| ENQCMD | Enqueue Command | -| ERMS | Enhanced REP MOVSB/STOSB | -| F16C | Half-precision floating-point conversion | -| FLUSH_L1D | Flush L1D cache | -| FMA3 | Intel FMA 3. Does not imply AVX. | -| FMA4 | Bulldozer FMA4 functions | -| FP128 | AMD: When set, the internal FP/SIMD execution datapath is 128-bits wide | -| FP256 | AMD: When set, the internal FP/SIMD execution datapath is 256-bits wide | -| FSRM | Fast Short Rep Mov | -| FXSR | FXSAVE, FXRESTOR instructions, CR4 bit 9 | -| FXSROPT | FXSAVE/FXRSTOR optimizations | -| GFNI | Galois Field New Instructions. May require other features (AVX, AVX512VL,AVX512F) based on usage. | -| HLE | Hardware Lock Elision | -| HRESET | If set CPU supports history reset and the IA32_HRESET_ENABLE MSR | -| HTT | Hyperthreading (enabled) | -| HWA | Hardware assert supported. Indicates support for MSRC001_10 | -| HYBRID_CPU | This part has CPUs of more than one type. | -| HYPERVISOR | This bit has been reserved by Intel & AMD for use by hypervisors | -| IA32_ARCH_CAP | IA32_ARCH_CAPABILITIES MSR (Intel) | -| IA32_CORE_CAP | IA32_CORE_CAPABILITIES MSR | -| IBPB | Indirect Branch Restricted Speculation (IBRS) and Indirect Branch Predictor Barrier (IBPB) | -| IBRS | AMD: Indirect Branch Restricted Speculation | -| IBRS_PREFERRED | AMD: IBRS is preferred over software solution | -| IBRS_PROVIDES_SMP | AMD: IBRS provides Same Mode Protection | -| IBS | Instruction Based Sampling (AMD) | -| IBSBRNTRGT | Instruction Based Sampling Feature (AMD) | -| IBSFETCHSAM | Instruction Based Sampling Feature (AMD) | -| IBSFFV | Instruction Based Sampling Feature (AMD) | -| IBSOPCNT | Instruction Based Sampling Feature (AMD) | -| IBSOPCNTEXT | Instruction Based Sampling Feature (AMD) | -| IBSOPSAM | Instruction Based Sampling Feature (AMD) | -| IBSRDWROPCNT | Instruction Based Sampling Feature (AMD) | -| IBSRIPINVALIDCHK | Instruction Based Sampling Feature (AMD) | -| IBS_FETCH_CTLX | AMD: IBS fetch control extended MSR supported | -| IBS_OPDATA4 | AMD: IBS op data 4 MSR supported | -| IBS_OPFUSE | AMD: Indicates support for IbsOpFuse | -| IBS_PREVENTHOST | Disallowing IBS use by the host supported | -| IBS_ZEN4 | Fetch and Op IBS support IBS extensions added with Zen4 | -| IDPRED_CTRL | IPRED_DIS | -| INT_WBINVD | WBINVD/WBNOINVD are interruptible. | -| INVLPGB | NVLPGB and TLBSYNC instruction supported | -| KEYLOCKER | Key locker | -| KEYLOCKERW | Key locker wide | -| LAHF | LAHF/SAHF in long mode | -| LAM | If set, CPU supports Linear Address Masking | -| LBRVIRT | LBR virtualization | -| LZCNT | LZCNT instruction | -| MCAOVERFLOW | MCA overflow recovery support. | -| MCDT_NO | Processor do not exhibit MXCSR Configuration Dependent Timing behavior and do not need to mitigate it. | -| MCOMMIT | MCOMMIT instruction supported | -| MD_CLEAR | VERW clears CPU buffers | -| MMX | standard MMX | -| MMXEXT | SSE integer functions or AMD MMX ext | -| MOVBE | MOVBE instruction (big-endian) | -| MOVDIR64B | Move 64 Bytes as Direct Store | -| MOVDIRI | Move Doubleword as Direct Store | -| MOVSB_ZL | Fast Zero-Length MOVSB | -| MPX | Intel MPX (Memory Protection Extensions) | -| MOVU | MOVU SSE instructions are more efficient and should be preferred to SSE MOVL/MOVH. MOVUPS is more efficient than MOVLPS/MOVHPS. MOVUPD is more efficient than MOVLPD/MOVHPD | -| MSRIRC | Instruction Retired Counter MSR available | -| MSRLIST | Read/Write List of Model Specific Registers | -| MSR_PAGEFLUSH | Page Flush MSR available | -| NRIPS | Indicates support for NRIP save on VMEXIT | -| NX | NX (No-Execute) bit | -| OSXSAVE | XSAVE enabled by OS | -| PCONFIG | PCONFIG for Intel Multi-Key Total Memory Encryption | -| POPCNT | POPCNT instruction | -| PPIN | AMD: Protected Processor Inventory Number support. Indicates that Protected Processor Inventory Number (PPIN) capability can be enabled | -| PREFETCHI | PREFETCHIT0/1 instructions | -| PSFD | Predictive Store Forward Disable | -| RDPRU | RDPRU instruction supported | -| RDRAND | RDRAND instruction is available | -| RDSEED | RDSEED instruction is available | -| RDTSCP | RDTSCP Instruction | -| RRSBA_CTRL | Restricted RSB Alternate | -| RTM | Restricted Transactional Memory | -| RTM_ALWAYS_ABORT | Indicates that the loaded microcode is forcing RTM abort. | -| SERIALIZE | Serialize Instruction Execution | -| SEV | AMD Secure Encrypted Virtualization supported | -| SEV_64BIT | AMD SEV guest execution only allowed from a 64-bit host | -| SEV_ALTERNATIVE | AMD SEV Alternate Injection supported | -| SEV_DEBUGSWAP | Full debug state swap supported for SEV-ES guests | -| SEV_ES | AMD SEV Encrypted State supported | -| SEV_RESTRICTED | AMD SEV Restricted Injection supported | -| SEV_SNP | AMD SEV Secure Nested Paging supported | -| SGX | Software Guard Extensions | -| SGXLC | Software Guard Extensions Launch Control | -| SGXPQC | Software Guard Extensions 256-bit Encryption | -| SHA | Intel SHA Extensions | -| SME | AMD Secure Memory Encryption supported | -| SME_COHERENT | AMD Hardware cache coherency across encryption domains enforced | -| SM3_X86 | SM3 instructions | -| SM4_X86 | SM4 instructions | -| SPEC_CTRL_SSBD | Speculative Store Bypass Disable | -| SRBDS_CTRL | SRBDS mitigation MSR available | -| SSE | SSE functions | -| SSE2 | P4 SSE functions | -| SSE3 | Prescott SSE3 functions | -| SSE4 | Penryn SSE4.1 functions | -| SSE42 | Nehalem SSE4.2 functions | -| SSE4A | AMD Barcelona microarchitecture SSE4a instructions | -| SSSE3 | Conroe SSSE3 functions | -| STIBP | Single Thread Indirect Branch Predictors | -| STIBP_ALWAYSON | AMD: Single Thread Indirect Branch Prediction Mode has Enhanced Performance and may be left Always On | -| STOSB_SHORT | Fast short STOSB | -| SUCCOR | Software uncorrectable error containment and recovery capability. | -| SVM | AMD Secure Virtual Machine | -| SVMDA | Indicates support for the SVM decode assists. | -| SVMFBASID | SVM, Indicates that TLB flush events, including CR3 writes and CR4.PGE toggles, flush only the current ASID's TLB entries. Also indicates support for the extended VMCBTLB_Control | -| SVML | AMD SVM lock. Indicates support for SVM-Lock. | -| SVMNP | AMD SVM nested paging | -| SVMPF | SVM pause intercept filter. Indicates support for the pause intercept filter | -| SVMPFT | SVM PAUSE filter threshold. Indicates support for the PAUSE filter cycle count threshold | -| SYSCALL | System-Call Extension (SCE): SYSCALL and SYSRET instructions. | -| SYSEE | SYSENTER and SYSEXIT instructions | -| TBM | AMD Trailing Bit Manipulation | -| TDX_GUEST | Intel Trust Domain Extensions Guest | -| TLB_FLUSH_NESTED | AMD: Flushing includes all the nested translations for guest translations | -| TME | Intel Total Memory Encryption. The following MSRs are supported: IA32_TME_CAPABILITY, IA32_TME_ACTIVATE, IA32_TME_EXCLUDE_MASK, and IA32_TME_EXCLUDE_BASE. | -| TOPEXT | TopologyExtensions: topology extensions support. Indicates support for CPUID Fn8000_001D_EAX_x[N:0]-CPUID Fn8000_001E_EDX. | -| TSA_L1_NO | AMD only: Not vulnerable to TSA-L1 | -| TSA_SQ_NO | AMD only: Not vulnerable to TSA-SQ | -| TSA_VERW_CLEAR | AMD: If set, the memory form of the VERW instruction may be used to help mitigate TSA | -| TSCRATEMSR | MSR based TSC rate control. Indicates support for MSR TSC ratio MSRC000_0104 | -| TSXLDTRK | Intel TSX Suspend Load Address Tracking | -| VAES | Vector AES. AVX(512) versions requires additional checks. | -| VMCBCLEAN | VMCB clean bits. Indicates support for VMCB clean bits. | -| VMPL | AMD VM Permission Levels supported | -| VMSA_REGPROT | AMD VMSA Register Protection supported | -| VMX | Virtual Machine Extensions | -| VPCLMULQDQ | Carry-Less Multiplication Quadword. Requires AVX for 3 register versions. | -| VTE | AMD Virtual Transparent Encryption supported | -| WAITPKG | TPAUSE, UMONITOR, UMWAIT | -| WBNOINVD | Write Back and Do Not Invalidate Cache | -| WRMSRNS | Non-Serializing Write to Model Specific Register | -| X87 | FPU | -| XGETBV1 | Supports XGETBV with ECX = 1 | -| XOP | Bulldozer XOP functions | -| XSAVE | XSAVE, XRESTOR, XSETBV, XGETBV | -| XSAVEC | Supports XSAVEC and the compacted form of XRSTOR. | -| XSAVEOPT | XSAVEOPT available | -| XSAVES | Supports XSAVES/XRSTORS and IA32_XSS | - -# ARM features: - -| Feature Flag | Description | -|--------------|------------------------------------------------------------------| -| AESARM | AES instructions | -| ARMCPUID | Some CPU ID registers readable at user-level | -| ASIMD | Advanced SIMD | -| ASIMDDP | SIMD Dot Product | -| ASIMDHP | Advanced SIMD half-precision floating point | -| ASIMDRDM | Rounding Double Multiply Accumulate/Subtract (SQRDMLAH/SQRDMLSH) | -| ATOMICS | Large System Extensions (LSE) | -| CRC32 | CRC32/CRC32C instructions | -| DCPOP | Data cache clean to Point of Persistence (DC CVAP) | -| EVTSTRM | Generic timer | -| FCMA | Floatin point complex number addition and multiplication | -| FHM | FMLAL and FMLSL instructions | -| FP | Single-precision and double-precision floating point | -| FPHP | Half-precision floating point | -| GPA | Generic Pointer Authentication | -| JSCVT | Javascript-style double->int convert (FJCVTZS) | -| LRCPC | Weaker release consistency (LDAPR, etc) | -| PMULL | Polynomial Multiply instructions (PMULL/PMULL2) | -| RNDR | Random Number instructions | -| TLB | Outer Shareable and TLB range maintenance instructions | -| TS | Flag manipulation instructions | -| SHA1 | SHA-1 instructions (SHA1C, etc) | -| SHA2 | SHA-2 instructions (SHA256H, etc) | -| SHA3 | SHA-3 instructions (EOR3, RAXI, XAR, BCAX) | -| SHA512 | SHA512 instructions | -| SM3 | SM3 instructions | -| SM4 | SM4 instructions | -| SVE | Scalable Vector Extension | - -# license - -This code is published under an MIT license. See LICENSE file for more information. diff --git a/vendor/github.com/klauspost/cpuid/v2/cpuid.go b/vendor/github.com/klauspost/cpuid/v2/cpuid.go deleted file mode 100644 index 9cf7738a..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/cpuid.go +++ /dev/null @@ -1,1679 +0,0 @@ -// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file. - -// Package cpuid provides information about the CPU running the current program. -// -// CPU features are detected on startup, and kept for fast access through the life of the application. -// Currently x86 / x64 (AMD64) as well as arm64 is supported. -// -// You can access the CPU information by accessing the shared CPU variable of the cpuid library. -// -// Package home: https://github.com/klauspost/cpuid -package cpuid - -import ( - "flag" - "fmt" - "math" - "math/bits" - "os" - "runtime" - "strings" -) - -// AMD refererence: https://www.amd.com/system/files/TechDocs/25481.pdf -// and Processor Programming Reference (PPR) - -// Vendor is a representation of a CPU vendor. -type Vendor int - -const ( - VendorUnknown Vendor = iota - Intel - AMD - VIA - Transmeta - NSC - KVM // Kernel-based Virtual Machine - MSVM // Microsoft Hyper-V or Windows Virtual PC - VMware - XenHVM - Bhyve - Hygon - SiS - RDC - - Ampere - ARM - Broadcom - Cavium - DEC - Fujitsu - Infineon - Motorola - NVIDIA - AMCC - Qualcomm - Marvell - - QEMU - QNX - ACRN - SRE - Apple - - lastVendor -) - -//go:generate stringer -type=FeatureID,Vendor - -// FeatureID is the ID of a specific cpu feature. -type FeatureID int - -const ( - // Keep index -1 as unknown - UNKNOWN = -1 - - // x86 features - ADX FeatureID = iota // Intel ADX (Multi-Precision Add-Carry Instruction Extensions) - AESNI // Advanced Encryption Standard New Instructions - AMD3DNOW // AMD 3DNOW - AMD3DNOWEXT // AMD 3DNowExt - AMXBF16 // Tile computational operations on BFLOAT16 numbers - AMXFP16 // Tile computational operations on FP16 numbers - AMXINT8 // Tile computational operations on 8-bit integers - AMXFP8 // Tile computational operations on FP8 numbers - AMXTILE // Tile architecture - AMXTF32 // Tile architecture - AMXCOMPLEX // Matrix Multiplication of TF32 Tiles into Packed Single Precision Tile - AMXTRANSPOSE // Tile multiply where the first operand is transposed - APX_F // Intel APX - AVX // AVX functions - AVX10 // If set the Intel AVX10 Converged Vector ISA is supported - AVX10_128 // If set indicates that AVX10 128-bit vector support is present - AVX10_256 // If set indicates that AVX10 256-bit vector support is present - AVX10_512 // If set indicates that AVX10 512-bit vector support is present - AVX2 // AVX2 functions - AVX512BF16 // AVX-512 BFLOAT16 Instructions - AVX512BITALG // AVX-512 Bit Algorithms - AVX512BW // AVX-512 Byte and Word Instructions - AVX512CD // AVX-512 Conflict Detection Instructions - AVX512DQ // AVX-512 Doubleword and Quadword Instructions - AVX512ER // AVX-512 Exponential and Reciprocal Instructions - AVX512F // AVX-512 Foundation - AVX512FP16 // AVX-512 FP16 Instructions - AVX512IFMA // AVX-512 Integer Fused Multiply-Add Instructions - AVX512PF // AVX-512 Prefetch Instructions - AVX512VBMI // AVX-512 Vector Bit Manipulation Instructions - AVX512VBMI2 // AVX-512 Vector Bit Manipulation Instructions, Version 2 - AVX512VL // AVX-512 Vector Length Extensions - AVX512VNNI // AVX-512 Vector Neural Network Instructions - AVX512VP2INTERSECT // AVX-512 Intersect for D/Q - AVX512VPOPCNTDQ // AVX-512 Vector Population Count Doubleword and Quadword - AVXIFMA // AVX-IFMA instructions - AVXNECONVERT // AVX-NE-CONVERT instructions - AVXSLOW // Indicates the CPU performs 2 128 bit operations instead of one - AVXVNNI // AVX (VEX encoded) VNNI neural network instructions - AVXVNNIINT8 // AVX-VNNI-INT8 instructions - AVXVNNIINT16 // AVX-VNNI-INT16 instructions - BHI_CTRL // Branch History Injection and Intra-mode Branch Target Injection / CVE-2022-0001, CVE-2022-0002 / INTEL-SA-00598 - BMI1 // Bit Manipulation Instruction Set 1 - BMI2 // Bit Manipulation Instruction Set 2 - CETIBT // Intel CET Indirect Branch Tracking - CETSS // Intel CET Shadow Stack - CLDEMOTE // Cache Line Demote - CLMUL // Carry-less Multiplication - CLZERO // CLZERO instruction supported - CMOV // i686 CMOV - CMPCCXADD // CMPCCXADD instructions - CMPSB_SCADBS_SHORT // Fast short CMPSB and SCASB - CMPXCHG8 // CMPXCHG8 instruction - CPBOOST // Core Performance Boost - CPPC // AMD: Collaborative Processor Performance Control - CX16 // CMPXCHG16B Instruction - EFER_LMSLE_UNS // AMD: =Core::X86::Msr::EFER[LMSLE] is not supported, and MBZ - ENQCMD // Enqueue Command - ERMS // Enhanced REP MOVSB/STOSB - F16C // Half-precision floating-point conversion - FLUSH_L1D // Flush L1D cache - FMA3 // Intel FMA 3. Does not imply AVX. - FMA4 // Bulldozer FMA4 functions - FP128 // AMD: When set, the internal FP/SIMD execution datapath is no more than 128-bits wide - FP256 // AMD: When set, the internal FP/SIMD execution datapath is no more than 256-bits wide - FSRM // Fast Short Rep Mov - FXSR // FXSAVE, FXRESTOR instructions, CR4 bit 9 - FXSROPT // FXSAVE/FXRSTOR optimizations - GFNI // Galois Field New Instructions. May require other features (AVX, AVX512VL,AVX512F) based on usage. - HLE // Hardware Lock Elision - HRESET // If set CPU supports history reset and the IA32_HRESET_ENABLE MSR - HTT // Hyperthreading (enabled) - HWA // Hardware assert supported. Indicates support for MSRC001_10 - HYBRID_CPU // This part has CPUs of more than one type. - HYPERVISOR // This bit has been reserved by Intel & AMD for use by hypervisors - IA32_ARCH_CAP // IA32_ARCH_CAPABILITIES MSR (Intel) - IA32_CORE_CAP // IA32_CORE_CAPABILITIES MSR - IBPB // Indirect Branch Restricted Speculation (IBRS) and Indirect Branch Predictor Barrier (IBPB) - IBPB_BRTYPE // Indicates that MSR 49h (PRED_CMD) bit 0 (IBPB) flushes all branch type predictions from the CPU branch predictor - IBRS // AMD: Indirect Branch Restricted Speculation - IBRS_PREFERRED // AMD: IBRS is preferred over software solution - IBRS_PROVIDES_SMP // AMD: IBRS provides Same Mode Protection - IBS // Instruction Based Sampling (AMD) - IBSBRNTRGT // Instruction Based Sampling Feature (AMD) - IBSFETCHSAM // Instruction Based Sampling Feature (AMD) - IBSFFV // Instruction Based Sampling Feature (AMD) - IBSOPCNT // Instruction Based Sampling Feature (AMD) - IBSOPCNTEXT // Instruction Based Sampling Feature (AMD) - IBSOPSAM // Instruction Based Sampling Feature (AMD) - IBSRDWROPCNT // Instruction Based Sampling Feature (AMD) - IBSRIPINVALIDCHK // Instruction Based Sampling Feature (AMD) - IBS_FETCH_CTLX // AMD: IBS fetch control extended MSR supported - IBS_OPDATA4 // AMD: IBS op data 4 MSR supported - IBS_OPFUSE // AMD: Indicates support for IbsOpFuse - IBS_PREVENTHOST // Disallowing IBS use by the host supported - IBS_ZEN4 // AMD: Fetch and Op IBS support IBS extensions added with Zen4 - IDPRED_CTRL // IPRED_DIS - INT_WBINVD // WBINVD/WBNOINVD are interruptible. - INVLPGB // NVLPGB and TLBSYNC instruction supported - KEYLOCKER // Key locker - KEYLOCKERW // Key locker wide - LAHF // LAHF/SAHF in long mode - LAM // If set, CPU supports Linear Address Masking - LBRVIRT // LBR virtualization - LZCNT // LZCNT instruction - MCAOVERFLOW // MCA overflow recovery support. - MCDT_NO // Processor do not exhibit MXCSR Configuration Dependent Timing behavior and do not need to mitigate it. - MCOMMIT // MCOMMIT instruction supported - MD_CLEAR // VERW clears CPU buffers - MMX // standard MMX - MMXEXT // SSE integer functions or AMD MMX ext - MOVBE // MOVBE instruction (big-endian) - MOVDIR64B // Move 64 Bytes as Direct Store - MOVDIRI // Move Doubleword as Direct Store - MOVSB_ZL // Fast Zero-Length MOVSB - MOVU // AMD: MOVU SSE instructions are more efficient and should be preferred to SSE MOVL/MOVH. MOVUPS is more efficient than MOVLPS/MOVHPS. MOVUPD is more efficient than MOVLPD/MOVHPD - MPX // Intel MPX (Memory Protection Extensions) - MSRIRC // Instruction Retired Counter MSR available - MSRLIST // Read/Write List of Model Specific Registers - MSR_PAGEFLUSH // Page Flush MSR available - NRIPS // Indicates support for NRIP save on VMEXIT - NX // NX (No-Execute) bit - OSXSAVE // XSAVE enabled by OS - PCONFIG // PCONFIG for Intel Multi-Key Total Memory Encryption - POPCNT // POPCNT instruction - PPIN // AMD: Protected Processor Inventory Number support. Indicates that Protected Processor Inventory Number (PPIN) capability can be enabled - PREFETCHI // PREFETCHIT0/1 instructions - PSFD // Predictive Store Forward Disable - RDPRU // RDPRU instruction supported - RDRAND // RDRAND instruction is available - RDSEED // RDSEED instruction is available - RDTSCP // RDTSCP Instruction - RRSBA_CTRL // Restricted RSB Alternate - RTM // Restricted Transactional Memory - RTM_ALWAYS_ABORT // Indicates that the loaded microcode is forcing RTM abort. - SBPB // Indicates support for the Selective Branch Predictor Barrier - SERIALIZE // Serialize Instruction Execution - SEV // AMD Secure Encrypted Virtualization supported - SEV_64BIT // AMD SEV guest execution only allowed from a 64-bit host - SEV_ALTERNATIVE // AMD SEV Alternate Injection supported - SEV_DEBUGSWAP // Full debug state swap supported for SEV-ES guests - SEV_ES // AMD SEV Encrypted State supported - SEV_RESTRICTED // AMD SEV Restricted Injection supported - SEV_SNP // AMD SEV Secure Nested Paging supported - SGX // Software Guard Extensions - SGXLC // Software Guard Extensions Launch Control - SGXPQC // Software Guard Extensions 256-bit Encryption - SHA // Intel SHA Extensions - SME // AMD Secure Memory Encryption supported - SME_COHERENT // AMD Hardware cache coherency across encryption domains enforced - SM3_X86 // SM3 instructions - SM4_X86 // SM4 instructions - SPEC_CTRL_SSBD // Speculative Store Bypass Disable - SRBDS_CTRL // SRBDS mitigation MSR available - SRSO_MSR_FIX // Indicates that software may use MSR BP_CFG[BpSpecReduce] to mitigate SRSO. - SRSO_NO // Indicates the CPU is not subject to the SRSO vulnerability - SRSO_USER_KERNEL_NO // Indicates the CPU is not subject to the SRSO vulnerability across user/kernel boundaries - SSE // SSE functions - SSE2 // P4 SSE functions - SSE3 // Prescott SSE3 functions - SSE4 // Penryn SSE4.1 functions - SSE42 // Nehalem SSE4.2 functions - SSE4A // AMD Barcelona microarchitecture SSE4a instructions - SSSE3 // Conroe SSSE3 functions - STIBP // Single Thread Indirect Branch Predictors - STIBP_ALWAYSON // AMD: Single Thread Indirect Branch Prediction Mode has Enhanced Performance and may be left Always On - STOSB_SHORT // Fast short STOSB - SUCCOR // Software uncorrectable error containment and recovery capability. - SVM // AMD Secure Virtual Machine - SVMDA // Indicates support for the SVM decode assists. - SVMFBASID // SVM, Indicates that TLB flush events, including CR3 writes and CR4.PGE toggles, flush only the current ASID's TLB entries. Also indicates support for the extended VMCBTLB_Control - SVML // AMD SVM lock. Indicates support for SVM-Lock. - SVMNP // AMD SVM nested paging - SVMPF // SVM pause intercept filter. Indicates support for the pause intercept filter - SVMPFT // SVM PAUSE filter threshold. Indicates support for the PAUSE filter cycle count threshold - SYSCALL // System-Call Extension (SCE): SYSCALL and SYSRET instructions. - SYSEE // SYSENTER and SYSEXIT instructions - TBM // AMD Trailing Bit Manipulation - TDX_GUEST // Intel Trust Domain Extensions Guest - TLB_FLUSH_NESTED // AMD: Flushing includes all the nested translations for guest translations - TME // Intel Total Memory Encryption. The following MSRs are supported: IA32_TME_CAPABILITY, IA32_TME_ACTIVATE, IA32_TME_EXCLUDE_MASK, and IA32_TME_EXCLUDE_BASE. - TOPEXT // TopologyExtensions: topology extensions support. Indicates support for CPUID Fn8000_001D_EAX_x[N:0]-CPUID Fn8000_001E_EDX. - TSA_L1_NO // AMD only: Not vulnerable to TSA-L1 - TSA_SQ_NO // AM onlyD: Not vulnerable to TSA-SQ - TSA_VERW_CLEAR // If set, the memory form of the VERW instruction may be used to help mitigate TSA - TSCRATEMSR // MSR based TSC rate control. Indicates support for MSR TSC ratio MSRC000_0104 - TSXLDTRK // Intel TSX Suspend Load Address Tracking - VAES // Vector AES. AVX(512) versions requires additional checks. - VMCBCLEAN // VMCB clean bits. Indicates support for VMCB clean bits. - VMPL // AMD VM Permission Levels supported - VMSA_REGPROT // AMD VMSA Register Protection supported - VMX // Virtual Machine Extensions - VPCLMULQDQ // Carry-Less Multiplication Quadword. Requires AVX for 3 register versions. - VTE // AMD Virtual Transparent Encryption supported - WAITPKG // TPAUSE, UMONITOR, UMWAIT - WBNOINVD // Write Back and Do Not Invalidate Cache - WRMSRNS // Non-Serializing Write to Model Specific Register - X87 // FPU - XGETBV1 // Supports XGETBV with ECX = 1 - XOP // Bulldozer XOP functions - XSAVE // XSAVE, XRESTOR, XSETBV, XGETBV - XSAVEC // Supports XSAVEC and the compacted form of XRSTOR. - XSAVEOPT // XSAVEOPT available - XSAVES // Supports XSAVES/XRSTORS and IA32_XSS - - // ARM features: - AESARM // AES instructions - ARMCPUID // Some CPU ID registers readable at user-level - ASIMD // Advanced SIMD - ASIMDDP // SIMD Dot Product - ASIMDHP // Advanced SIMD half-precision floating point - ASIMDRDM // Rounding Double Multiply Accumulate/Subtract (SQRDMLAH/SQRDMLSH) - ATOMICS // Large System Extensions (LSE) - CRC32 // CRC32/CRC32C instructions - DCPOP // Data cache clean to Point of Persistence (DC CVAP) - EVTSTRM // Generic timer - FCMA // Floating point complex number addition and multiplication - FHM // FMLAL and FMLSL instructions - FP // Single-precision and double-precision floating point - FPHP // Half-precision floating point - GPA // Generic Pointer Authentication - JSCVT // Javascript-style double->int convert (FJCVTZS) - LRCPC // Weaker release consistency (LDAPR, etc) - PMULL // Polynomial Multiply instructions (PMULL/PMULL2) - RNDR // Random Number instructions - TLB // Outer Shareable and TLB range maintenance instructions - TS // Flag manipulation instructions - SHA1 // SHA-1 instructions (SHA1C, etc) - SHA2 // SHA-2 instructions (SHA256H, etc) - SHA3 // SHA-3 instructions (EOR3, RAXI, XAR, BCAX) - SHA512 // SHA512 instructions - SM3 // SM3 instructions - SM4 // SM4 instructions - SVE // Scalable Vector Extension - - // PMU - PMU_FIXEDCOUNTER_CYCLES - PMU_FIXEDCOUNTER_REFCYCLES - PMU_FIXEDCOUNTER_INSTRUCTIONS - PMU_FIXEDCOUNTER_TOPDOWN_SLOTS - - // Keep it last. It automatically defines the size of []flagSet - lastID - - firstID FeatureID = UNKNOWN + 1 -) - -// CPUInfo contains information about the detected system CPU. -type CPUInfo struct { - BrandName string // Brand name reported by the CPU - VendorID Vendor // Comparable CPU vendor ID - VendorString string // Raw vendor string. - HypervisorVendorID Vendor // Hypervisor vendor - HypervisorVendorString string // Raw hypervisor vendor string - featureSet flagSet // Features of the CPU - PhysicalCores int // Number of physical processor cores in your CPU. Will be 0 if undetectable. - ThreadsPerCore int // Number of threads per physical core. Will be 1 if undetectable. - LogicalCores int // Number of physical cores times threads that can run on each core through the use of hyperthreading. Will be 0 if undetectable. - Family int // CPU family number - Model int // CPU model number - Stepping int // CPU stepping info - CacheLine int // Cache line size in bytes. Will be 0 if undetectable. - Hz int64 // Clock speed, if known, 0 otherwise. Will attempt to contain base clock speed. - BoostFreq int64 // Max clock speed, if known, 0 otherwise - Cache struct { - L1I int // L1 Instruction Cache (per core or shared). Will be -1 if undetected - L1D int // L1 Data Cache (per core or shared). Will be -1 if undetected - L2 int // L2 Cache (per core or shared). Will be -1 if undetected - L3 int // L3 Cache (per core, per ccx or shared). Will be -1 if undetected - } - SGX SGXSupport - AMDMemEncryption AMDMemEncryptionSupport - AVX10Level uint8 - PMU PerformanceMonitoringInfo // holds information about the PMU - - maxFunc uint32 - maxExFunc uint32 -} - -// PerformanceMonitoringInfo holds information about CPU performance monitoring capabilities. -// This is primarily populated from CPUID leaf 0xAh on x86 -type PerformanceMonitoringInfo struct { - // VersionID (x86 only): Version ID of architectural performance monitoring. - // A value of 0 means architectural performance monitoring is not supported or information is unavailable. - VersionID uint8 - // NumGPPMC: Number of General-Purpose Performance Monitoring Counters per logical processor. - // On ARM, this is derived from PMCR_EL0.N (number of event counters). - NumGPCounters uint8 - // GPPMCWidth: Bit width of General-Purpose Performance Monitoring Counters. - // On ARM, typically 64 for PMU event counters. - GPPMCWidth uint8 - // NumFixedPMC: Number of Fixed-Function Performance Counters. - // Valid on x86 if VersionID > 1. On ARM, this typically includes at least the cycle counter (PMCCNTR_EL0). - NumFixedPMC uint8 - // FixedPMCWidth: Bit width of Fixed-Function Performance Counters. - // Valid on x86 if VersionID > 1. On ARM, the cycle counter (PMCCNTR_EL0) is 64-bit. - FixedPMCWidth uint8 - // Raw register output from CPUID leaf 0xAh. - RawEBX uint32 - RawEAX uint32 - RawEDX uint32 -} - -var cpuid func(op uint32) (eax, ebx, ecx, edx uint32) -var cpuidex func(op, op2 uint32) (eax, ebx, ecx, edx uint32) -var xgetbv func(index uint32) (eax, edx uint32) -var rdtscpAsm func() (eax, ebx, ecx, edx uint32) -var darwinHasAVX512 = func() bool { return false } - -// CPU contains information about the CPU as detected on startup, -// or when Detect last was called. -// -// Use this as the primary entry point to you data. -var CPU CPUInfo - -func init() { - initCPU() - Detect() -} - -// Detect will re-detect current CPU info. -// This will replace the content of the exported CPU variable. -// -// Unless you expect the CPU to change while you are running your program -// you should not need to call this function. -// If you call this, you must ensure that no other goroutine is accessing the -// exported CPU variable. -func Detect() { - // Set defaults - CPU.ThreadsPerCore = 1 - CPU.Cache.L1I = -1 - CPU.Cache.L1D = -1 - CPU.Cache.L2 = -1 - CPU.Cache.L3 = -1 - safe := true - if detectArmFlag != nil { - safe = !*detectArmFlag - } - addInfo(&CPU, safe) - if displayFeats != nil && *displayFeats { - fmt.Println("cpu features:", strings.Join(CPU.FeatureSet(), ",")) - // Exit with non-zero so tests will print value. - os.Exit(1) - } - if disableFlag != nil { - s := strings.Split(*disableFlag, ",") - for _, feat := range s { - feat := ParseFeature(strings.TrimSpace(feat)) - if feat != UNKNOWN { - CPU.featureSet.unset(feat) - } - } - } -} - -// DetectARM will detect ARM64 features. -// This is NOT done automatically since it can potentially crash -// if the OS does not handle the command. -// If in the future this can be done safely this function may not -// do anything. -func DetectARM() { - addInfo(&CPU, false) -} - -var detectArmFlag *bool -var displayFeats *bool -var disableFlag *string - -// Flags will enable flags. -// This must be called *before* flag.Parse AND -// Detect must be called after the flags have been parsed. -// Note that this means that any detection used in init() functions -// will not contain these flags. -func Flags() { - disableFlag = flag.String("cpu.disable", "", "disable cpu features; comma separated list") - displayFeats = flag.Bool("cpu.features", false, "lists cpu features and exits") - detectArmFlag = flag.Bool("cpu.arm", false, "allow ARM features to be detected; can potentially crash") -} - -// Supports returns whether the CPU supports all of the requested features. -func (c CPUInfo) Supports(ids ...FeatureID) bool { - for _, id := range ids { - if !c.featureSet.inSet(id) { - return false - } - } - return true -} - -// Has allows for checking a single feature. -// Should be inlined by the compiler. -func (c *CPUInfo) Has(id FeatureID) bool { - return c.featureSet.inSet(id) -} - -// AnyOf returns whether the CPU supports one or more of the requested features. -func (c CPUInfo) AnyOf(ids ...FeatureID) bool { - for _, id := range ids { - if c.featureSet.inSet(id) { - return true - } - } - return false -} - -// Features contains several features combined for a fast check using -// CpuInfo.HasAll -type Features *flagSet - -// CombineFeatures allows to combine several features for a close to constant time lookup. -func CombineFeatures(ids ...FeatureID) Features { - var v flagSet - for _, id := range ids { - v.set(id) - } - return &v -} - -func (c *CPUInfo) HasAll(f Features) bool { - return c.featureSet.hasSetP(f) -} - -// https://en.wikipedia.org/wiki/X86-64#Microarchitecture_levels -var oneOfLevel = CombineFeatures(SYSEE, SYSCALL) -var level1Features = CombineFeatures(CMOV, CMPXCHG8, X87, FXSR, MMX, SSE, SSE2) -var level2Features = CombineFeatures(CMOV, CMPXCHG8, X87, FXSR, MMX, SSE, SSE2, CX16, LAHF, POPCNT, SSE3, SSE4, SSE42, SSSE3) -var level3Features = CombineFeatures(CMOV, CMPXCHG8, X87, FXSR, MMX, SSE, SSE2, CX16, LAHF, POPCNT, SSE3, SSE4, SSE42, SSSE3, AVX, AVX2, BMI1, BMI2, F16C, FMA3, LZCNT, MOVBE, OSXSAVE) -var level4Features = CombineFeatures(CMOV, CMPXCHG8, X87, FXSR, MMX, SSE, SSE2, CX16, LAHF, POPCNT, SSE3, SSE4, SSE42, SSSE3, AVX, AVX2, BMI1, BMI2, F16C, FMA3, LZCNT, MOVBE, OSXSAVE, AVX512F, AVX512BW, AVX512CD, AVX512DQ, AVX512VL) - -// X64Level returns the microarchitecture level detected on the CPU. -// If features are lacking or non x64 mode, 0 is returned. -// See https://en.wikipedia.org/wiki/X86-64#Microarchitecture_levels -func (c CPUInfo) X64Level() int { - if !c.featureSet.hasOneOf(oneOfLevel) { - return 0 - } - if c.featureSet.hasSetP(level4Features) { - return 4 - } - if c.featureSet.hasSetP(level3Features) { - return 3 - } - if c.featureSet.hasSetP(level2Features) { - return 2 - } - if c.featureSet.hasSetP(level1Features) { - return 1 - } - return 0 -} - -// Disable will disable one or several features. -func (c *CPUInfo) Disable(ids ...FeatureID) bool { - for _, id := range ids { - c.featureSet.unset(id) - } - return true -} - -// Enable will disable one or several features even if they were undetected. -// This is of course not recommended for obvious reasons. -func (c *CPUInfo) Enable(ids ...FeatureID) bool { - for _, id := range ids { - c.featureSet.set(id) - } - return true -} - -// IsVendor returns true if vendor is recognized as Intel -func (c CPUInfo) IsVendor(v Vendor) bool { - return c.VendorID == v -} - -// FeatureSet returns all available features as strings. -func (c CPUInfo) FeatureSet() []string { - s := make([]string, 0, c.featureSet.nEnabled()) - s = append(s, c.featureSet.Strings()...) - return s -} - -// RTCounter returns the 64-bit time-stamp counter -// Uses the RDTSCP instruction. The value 0 is returned -// if the CPU does not support the instruction. -func (c CPUInfo) RTCounter() uint64 { - if !c.Has(RDTSCP) { - return 0 - } - a, _, _, d := rdtscpAsm() - return uint64(a) | (uint64(d) << 32) -} - -// Ia32TscAux returns the IA32_TSC_AUX part of the RDTSCP. -// This variable is OS dependent, but on Linux contains information -// about the current cpu/core the code is running on. -// If the RDTSCP instruction isn't supported on the CPU, the value 0 is returned. -func (c CPUInfo) Ia32TscAux() uint32 { - if !c.Has(RDTSCP) { - return 0 - } - _, _, ecx, _ := rdtscpAsm() - return ecx -} - -// SveLengths returns arm SVE vector and predicate lengths in bits. -// Will return 0, 0 if SVE is not enabled or otherwise unable to detect. -func (c CPUInfo) SveLengths() (vl, pl uint64) { - if !c.Has(SVE) { - return 0, 0 - } - return getVectorLength() -} - -// LogicalCPU will return the Logical CPU the code is currently executing on. -// This is likely to change when the OS re-schedules the running thread -// to another CPU. -// If the current core cannot be detected, -1 will be returned. -func (c CPUInfo) LogicalCPU() int { - if c.maxFunc < 1 { - return -1 - } - _, ebx, _, _ := cpuid(1) - return int(ebx >> 24) -} - -// frequencies tries to compute the clock speed of the CPU. If leaf 15 is -// supported, use it, otherwise parse the brand string. Yes, really. -func (c *CPUInfo) frequencies() { - c.Hz, c.BoostFreq = 0, 0 - mfi := maxFunctionID() - if mfi >= 0x15 { - eax, ebx, ecx, _ := cpuid(0x15) - if eax != 0 && ebx != 0 && ecx != 0 { - c.Hz = (int64(ecx) * int64(ebx)) / int64(eax) - } - } - if mfi >= 0x16 { - a, b, _, _ := cpuid(0x16) - // Base... - if a&0xffff > 0 { - c.Hz = int64(a&0xffff) * 1_000_000 - } - // Boost... - if b&0xffff > 0 { - c.BoostFreq = int64(b&0xffff) * 1_000_000 - } - } - if c.Hz > 0 { - return - } - - // computeHz determines the official rated speed of a CPU from its brand - // string. This insanity is *actually the official documented way to do - // this according to Intel*, prior to leaf 0x15 existing. The official - // documentation only shows this working for exactly `x.xx` or `xxxx` - // cases, e.g., `2.50GHz` or `1300MHz`; this parser will accept other - // sizes. - model := c.BrandName - hz := strings.LastIndex(model, "Hz") - if hz < 3 { - return - } - var multiplier int64 - switch model[hz-1] { - case 'M': - multiplier = 1000 * 1000 - case 'G': - multiplier = 1000 * 1000 * 1000 - case 'T': - multiplier = 1000 * 1000 * 1000 * 1000 - } - if multiplier == 0 { - return - } - freq := int64(0) - divisor := int64(0) - decimalShift := int64(1) - var i int - for i = hz - 2; i >= 0 && model[i] != ' '; i-- { - if model[i] >= '0' && model[i] <= '9' { - freq += int64(model[i]-'0') * decimalShift - decimalShift *= 10 - } else if model[i] == '.' { - if divisor != 0 { - return - } - divisor = decimalShift - } else { - return - } - } - // we didn't find a space - if i < 0 { - return - } - if divisor != 0 { - c.Hz = (freq * multiplier) / divisor - return - } - c.Hz = freq * multiplier -} - -// VM Will return true if the cpu id indicates we are in -// a virtual machine. -func (c CPUInfo) VM() bool { - return CPU.featureSet.inSet(HYPERVISOR) -} - -// flags contains detected cpu features and characteristics -type flags uint64 - -// log2(bits_in_uint64) -const flagBitsLog2 = 6 -const flagBits = 1 << flagBitsLog2 -const flagMask = flagBits - 1 - -// flagSet contains detected cpu features and characteristics in an array of flags -type flagSet [(lastID + flagMask) / flagBits]flags - -func (s *flagSet) inSet(feat FeatureID) bool { - return s[feat>>flagBitsLog2]&(1<<(feat&flagMask)) != 0 -} - -func (s *flagSet) set(feat FeatureID) { - s[feat>>flagBitsLog2] |= 1 << (feat & flagMask) -} - -// setIf will set a feature if boolean is true. -func (s *flagSet) setIf(cond bool, features ...FeatureID) { - if cond { - for _, offset := range features { - s[offset>>flagBitsLog2] |= 1 << (offset & flagMask) - } - } -} - -func (s *flagSet) unset(offset FeatureID) { - bit := flags(1 << (offset & flagMask)) - s[offset>>flagBitsLog2] = s[offset>>flagBitsLog2] & ^bit -} - -// or with another flagset. -func (s *flagSet) or(other flagSet) { - for i, v := range other[:] { - s[i] |= v - } -} - -// hasSet returns whether all features are present. -func (s *flagSet) hasSet(other flagSet) bool { - for i, v := range other[:] { - if s[i]&v != v { - return false - } - } - return true -} - -// hasSet returns whether all features are present. -func (s *flagSet) hasSetP(other *flagSet) bool { - for i, v := range other[:] { - if s[i]&v != v { - return false - } - } - return true -} - -// hasOneOf returns whether one or more features are present. -func (s *flagSet) hasOneOf(other *flagSet) bool { - for i, v := range other[:] { - if s[i]&v != 0 { - return true - } - } - return false -} - -// nEnabled will return the number of enabled flags. -func (s *flagSet) nEnabled() (n int) { - for _, v := range s[:] { - n += bits.OnesCount64(uint64(v)) - } - return n -} - -func flagSetWith(feat ...FeatureID) flagSet { - var res flagSet - for _, f := range feat { - res.set(f) - } - return res -} - -// ParseFeature will parse the string and return the ID of the matching feature. -// Will return UNKNOWN if not found. -func ParseFeature(s string) FeatureID { - s = strings.ToUpper(s) - for i := firstID; i < lastID; i++ { - if i.String() == s { - return i - } - } - return UNKNOWN -} - -// Strings returns an array of the detected features for FlagsSet. -func (s flagSet) Strings() []string { - if len(s) == 0 { - return []string{""} - } - r := make([]string, 0) - for i := firstID; i < lastID; i++ { - if s.inSet(i) { - r = append(r, i.String()) - } - } - return r -} - -func maxExtendedFunction() uint32 { - eax, _, _, _ := cpuid(0x80000000) - return eax -} - -func maxFunctionID() uint32 { - a, _, _, _ := cpuid(0) - return a -} - -func brandName() string { - if maxExtendedFunction() >= 0x80000004 { - v := make([]uint32, 0, 48) - for i := uint32(0); i < 3; i++ { - a, b, c, d := cpuid(0x80000002 + i) - v = append(v, a, b, c, d) - } - return strings.Trim(string(valAsString(v...)), " ") - } - return "unknown" -} - -func threadsPerCore() int { - mfi := maxFunctionID() - vend, _ := vendorID() - - if mfi < 0x4 || (vend != Intel && vend != AMD) { - return 1 - } - - if mfi < 0xb { - if vend != Intel { - return 1 - } - _, b, _, d := cpuid(1) - if (d & (1 << 28)) != 0 { - // v will contain logical core count - v := (b >> 16) & 255 - if v > 1 { - a4, _, _, _ := cpuid(4) - // physical cores - v2 := (a4 >> 26) + 1 - if v2 > 0 { - return int(v) / int(v2) - } - } - } - return 1 - } - _, b, _, _ := cpuidex(0xb, 0) - if b&0xffff == 0 { - if vend == AMD { - // if >= Zen 2 0x8000001e EBX 15-8 bits means threads per core. - // The number of threads per core is ThreadsPerCore+1 - // See PPR for AMD Family 17h Models 00h-0Fh (page 82) - fam, _, _ := familyModel() - _, _, _, d := cpuid(1) - if (d&(1<<28)) != 0 && fam >= 23 { - if maxExtendedFunction() >= 0x8000001e { - _, b, _, _ := cpuid(0x8000001e) - return int((b>>8)&0xff) + 1 - } - return 2 - } - } - return 1 - } - return int(b & 0xffff) -} - -func logicalCores() int { - mfi := maxFunctionID() - v, _ := vendorID() - switch v { - case Intel: - // Use this on old Intel processors - if mfi < 0xb { - if mfi < 1 { - return 0 - } - // CPUID.1:EBX[23:16] represents the maximum number of addressable IDs (initial APIC ID) - // that can be assigned to logical processors in a physical package. - // The value may not be the same as the number of logical processors that are present in the hardware of a physical package. - _, ebx, _, _ := cpuid(1) - logical := (ebx >> 16) & 0xff - return int(logical) - } - _, b, _, _ := cpuidex(0xb, 1) - return int(b & 0xffff) - case AMD, Hygon: - _, b, _, _ := cpuid(1) - return int((b >> 16) & 0xff) - default: - return 0 - } -} - -func familyModel() (family, model, stepping int) { - if maxFunctionID() < 0x1 { - return 0, 0, 0 - } - eax, _, _, _ := cpuid(1) - // If BaseFamily[3:0] is less than Fh then ExtendedFamily[7:0] is reserved and Family is equal to BaseFamily[3:0]. - family = int((eax >> 8) & 0xf) - extFam := family == 0x6 // Intel is 0x6, needs extended model. - if family == 0xf { - // Add ExtFamily - family += int((eax >> 20) & 0xff) - extFam = true - } - // If BaseFamily[3:0] is less than 0Fh then ExtendedModel[3:0] is reserved and Model is equal to BaseModel[3:0]. - model = int((eax >> 4) & 0xf) - if extFam { - // Add ExtModel - model += int((eax >> 12) & 0xf0) - } - stepping = int(eax & 0xf) - return family, model, stepping -} - -func physicalCores() int { - v, _ := vendorID() - switch v { - case Intel: - lc := logicalCores() - tpc := threadsPerCore() - if lc > 0 && tpc > 0 { - return lc / tpc - } - return 0 - case AMD, Hygon: - lc := logicalCores() - tpc := threadsPerCore() - if lc > 0 && tpc > 0 { - return lc / tpc - } - - // The following is inaccurate on AMD EPYC 7742 64-Core Processor - if maxExtendedFunction() >= 0x80000008 { - _, _, c, _ := cpuid(0x80000008) - if c&0xff > 0 { - return int(c&0xff) + 1 - } - } - } - return 0 -} - -// Except from http://en.wikipedia.org/wiki/CPUID#EAX.3D0:_Get_vendor_ID -var vendorMapping = map[string]Vendor{ - "AMDisbetter!": AMD, - "AuthenticAMD": AMD, - "CentaurHauls": VIA, - "GenuineIntel": Intel, - "TransmetaCPU": Transmeta, - "GenuineTMx86": Transmeta, - "Geode by NSC": NSC, - "VIA VIA VIA ": VIA, - "KVMKVMKVM": KVM, - "Linux KVM Hv": KVM, - "TCGTCGTCGTCG": QEMU, - "Microsoft Hv": MSVM, - "VMwareVMware": VMware, - "XenVMMXenVMM": XenHVM, - "bhyve bhyve ": Bhyve, - "HygonGenuine": Hygon, - "Vortex86 SoC": SiS, - "SiS SiS SiS ": SiS, - "RiseRiseRise": SiS, - "Genuine RDC": RDC, - "QNXQVMBSQG": QNX, - "ACRNACRNACRN": ACRN, - "SRESRESRESRE": SRE, - "Apple VZ": Apple, -} - -func vendorID() (Vendor, string) { - _, b, c, d := cpuid(0) - v := string(valAsString(b, d, c)) - vend, ok := vendorMapping[v] - if !ok { - return VendorUnknown, v - } - return vend, v -} - -func hypervisorVendorID() (Vendor, string) { - // https://lwn.net/Articles/301888/ - _, b, c, d := cpuid(0x40000000) - v := string(valAsString(b, c, d)) - vend, ok := vendorMapping[v] - if !ok { - return VendorUnknown, v - } - return vend, v -} - -func cacheLine() int { - if maxFunctionID() < 0x1 { - return 0 - } - - _, ebx, _, _ := cpuid(1) - cache := (ebx & 0xff00) >> 5 // cflush size - if cache == 0 && maxExtendedFunction() >= 0x80000006 { - _, _, ecx, _ := cpuid(0x80000006) - cache = ecx & 0xff // cacheline size - } - // TODO: Read from Cache and TLB Information - return int(cache) -} - -func (c *CPUInfo) cacheSize() { - c.Cache.L1D = -1 - c.Cache.L1I = -1 - c.Cache.L2 = -1 - c.Cache.L3 = -1 - vendor, _ := vendorID() - switch vendor { - case Intel: - if maxFunctionID() < 4 { - return - } - c.Cache.L1I, c.Cache.L1D, c.Cache.L2, c.Cache.L3 = 0, 0, 0, 0 - for i := uint32(0); ; i++ { - eax, ebx, ecx, _ := cpuidex(4, i) - cacheType := eax & 15 - if cacheType == 0 { - break - } - cacheLevel := (eax >> 5) & 7 - coherency := int(ebx&0xfff) + 1 - partitions := int((ebx>>12)&0x3ff) + 1 - associativity := int((ebx>>22)&0x3ff) + 1 - sets := int(ecx) + 1 - size := associativity * partitions * coherency * sets - switch cacheLevel { - case 1: - if cacheType == 1 { - // 1 = Data Cache - c.Cache.L1D = size - } else if cacheType == 2 { - // 2 = Instruction Cache - c.Cache.L1I = size - } else { - if c.Cache.L1D < 0 { - c.Cache.L1I = size - } - if c.Cache.L1I < 0 { - c.Cache.L1I = size - } - } - case 2: - c.Cache.L2 = size - case 3: - c.Cache.L3 = size - } - } - case AMD, Hygon: - // Untested. - if maxExtendedFunction() < 0x80000005 { - return - } - _, _, ecx, edx := cpuid(0x80000005) - c.Cache.L1D = int(((ecx >> 24) & 0xFF) * 1024) - c.Cache.L1I = int(((edx >> 24) & 0xFF) * 1024) - - if maxExtendedFunction() < 0x80000006 { - return - } - _, _, ecx, _ = cpuid(0x80000006) - c.Cache.L2 = int(((ecx >> 16) & 0xFFFF) * 1024) - - // CPUID Fn8000_001D_EAX_x[N:0] Cache Properties - if maxExtendedFunction() < 0x8000001D || !c.Has(TOPEXT) { - return - } - - // Xen Hypervisor is buggy and returns the same entry no matter ECX value. - // Hack: When we encounter the same entry 100 times we break. - nSame := 0 - var last uint32 - for i := uint32(0); i < math.MaxUint32; i++ { - eax, ebx, ecx, _ := cpuidex(0x8000001D, i) - - level := (eax >> 5) & 7 - cacheNumSets := ecx + 1 - cacheLineSize := 1 + (ebx & 2047) - cachePhysPartitions := 1 + ((ebx >> 12) & 511) - cacheNumWays := 1 + ((ebx >> 22) & 511) - - typ := eax & 15 - size := int(cacheNumSets * cacheLineSize * cachePhysPartitions * cacheNumWays) - if typ == 0 { - return - } - - // Check for the same value repeated. - comb := eax ^ ebx ^ ecx - if comb == last { - nSame++ - if nSame == 100 { - return - } - } - last = comb - - switch level { - case 1: - switch typ { - case 1: - // Data cache - c.Cache.L1D = size - case 2: - // Inst cache - c.Cache.L1I = size - default: - if c.Cache.L1D < 0 { - c.Cache.L1I = size - } - if c.Cache.L1I < 0 { - c.Cache.L1I = size - } - } - case 2: - c.Cache.L2 = size - case 3: - c.Cache.L3 = size - } - } - } -} - -type SGXEPCSection struct { - BaseAddress uint64 - EPCSize uint64 -} - -type SGXSupport struct { - Available bool - LaunchControl bool - SGX1Supported bool - SGX2Supported bool - MaxEnclaveSizeNot64 int64 - MaxEnclaveSize64 int64 - EPCSections []SGXEPCSection -} - -func hasSGX(available, lc bool) (rval SGXSupport) { - rval.Available = available - - if !available { - return - } - - rval.LaunchControl = lc - - a, _, _, d := cpuidex(0x12, 0) - rval.SGX1Supported = a&0x01 != 0 - rval.SGX2Supported = a&0x02 != 0 - rval.MaxEnclaveSizeNot64 = 1 << (d & 0xFF) // pow 2 - rval.MaxEnclaveSize64 = 1 << ((d >> 8) & 0xFF) // pow 2 - rval.EPCSections = make([]SGXEPCSection, 0) - - for subleaf := uint32(2); subleaf < 2+8; subleaf++ { - eax, ebx, ecx, edx := cpuidex(0x12, subleaf) - leafType := eax & 0xf - - if leafType == 0 { - // Invalid subleaf, stop iterating - break - } else if leafType == 1 { - // EPC Section subleaf - baseAddress := uint64(eax&0xfffff000) + (uint64(ebx&0x000fffff) << 32) - size := uint64(ecx&0xfffff000) + (uint64(edx&0x000fffff) << 32) - - section := SGXEPCSection{BaseAddress: baseAddress, EPCSize: size} - rval.EPCSections = append(rval.EPCSections, section) - } - } - - return -} - -type AMDMemEncryptionSupport struct { - Available bool - CBitPossition uint32 - NumVMPL uint32 - PhysAddrReduction uint32 - NumEntryptedGuests uint32 - MinSevNoEsAsid uint32 -} - -func hasAMDMemEncryption(available bool) (rval AMDMemEncryptionSupport) { - rval.Available = available - if !available { - return - } - - _, b, c, d := cpuidex(0x8000001f, 0) - - rval.CBitPossition = b & 0x3f - rval.PhysAddrReduction = (b >> 6) & 0x3F - rval.NumVMPL = (b >> 12) & 0xf - rval.NumEntryptedGuests = c - rval.MinSevNoEsAsid = d - - return -} - -func support() flagSet { - var fs flagSet - mfi := maxFunctionID() - vend, _ := vendorID() - if mfi < 0x1 { - return fs - } - family, model, _ := familyModel() - - _, _, c, d := cpuid(1) - fs.setIf((d&(1<<0)) != 0, X87) - fs.setIf((d&(1<<8)) != 0, CMPXCHG8) - fs.setIf((d&(1<<11)) != 0, SYSEE) - fs.setIf((d&(1<<15)) != 0, CMOV) - fs.setIf((d&(1<<23)) != 0, MMX) - fs.setIf((d&(1<<24)) != 0, FXSR) - fs.setIf((d&(1<<25)) != 0, FXSROPT) - fs.setIf((d&(1<<25)) != 0, SSE) - fs.setIf((d&(1<<26)) != 0, SSE2) - fs.setIf((c&1) != 0, SSE3) - fs.setIf((c&(1<<5)) != 0, VMX) - fs.setIf((c&(1<<9)) != 0, SSSE3) - fs.setIf((c&(1<<19)) != 0, SSE4) - fs.setIf((c&(1<<20)) != 0, SSE42) - fs.setIf((c&(1<<25)) != 0, AESNI) - fs.setIf((c&(1<<1)) != 0, CLMUL) - fs.setIf(c&(1<<22) != 0, MOVBE) - fs.setIf(c&(1<<23) != 0, POPCNT) - fs.setIf(c&(1<<30) != 0, RDRAND) - - // This bit has been reserved by Intel & AMD for use by hypervisors, - // and indicates the presence of a hypervisor. - fs.setIf(c&(1<<31) != 0, HYPERVISOR) - fs.setIf(c&(1<<29) != 0, F16C) - fs.setIf(c&(1<<13) != 0, CX16) - - if vend == Intel && (d&(1<<28)) != 0 && mfi >= 4 { - fs.setIf(threadsPerCore() > 1, HTT) - } - if vend == AMD && (d&(1<<28)) != 0 && mfi >= 4 { - fs.setIf(threadsPerCore() > 1, HTT) - } - fs.setIf(c&1<<26 != 0, XSAVE) - fs.setIf(c&1<<27 != 0, OSXSAVE) - // Check XGETBV/XSAVE (26), OXSAVE (27) and AVX (28) bits - const avxCheck = 1<<26 | 1<<27 | 1<<28 - if c&avxCheck == avxCheck { - // Check for OS support - eax, _ := xgetbv(0) - if (eax & 0x6) == 0x6 { - fs.set(AVX) - switch vend { - case Intel: - // Older than Haswell. - fs.setIf(family == 6 && model < 60, AVXSLOW) - case AMD: - // Older than Zen 2 - fs.setIf(family < 23 || (family == 23 && model < 49), AVXSLOW) - } - } - } - // FMA3 can be used with SSE registers, so no OS support is strictly needed. - // fma3 and OSXSAVE needed. - const fma3Check = 1<<12 | 1<<27 - fs.setIf(c&fma3Check == fma3Check, FMA3) - - // Check AVX2, AVX2 requires OS support, but BMI1/2 don't. - if mfi >= 7 { - _, ebx, ecx, edx := cpuidex(7, 0) - if fs.inSet(AVX) && (ebx&0x00000020) != 0 { - fs.set(AVX2) - } - // CPUID.(EAX=7, ECX=0).EBX - if (ebx & 0x00000008) != 0 { - fs.set(BMI1) - fs.setIf((ebx&0x00000100) != 0, BMI2) - } - fs.setIf(ebx&(1<<2) != 0, SGX) - fs.setIf(ebx&(1<<4) != 0, HLE) - fs.setIf(ebx&(1<<9) != 0, ERMS) - fs.setIf(ebx&(1<<11) != 0, RTM) - fs.setIf(ebx&(1<<14) != 0, MPX) - fs.setIf(ebx&(1<<18) != 0, RDSEED) - fs.setIf(ebx&(1<<19) != 0, ADX) - fs.setIf(ebx&(1<<29) != 0, SHA) - - // CPUID.(EAX=7, ECX=0).ECX - fs.setIf(ecx&(1<<5) != 0, WAITPKG) - fs.setIf(ecx&(1<<7) != 0, CETSS) - fs.setIf(ecx&(1<<8) != 0, GFNI) - fs.setIf(ecx&(1<<9) != 0, VAES) - fs.setIf(ecx&(1<<10) != 0, VPCLMULQDQ) - fs.setIf(ecx&(1<<13) != 0, TME) - fs.setIf(ecx&(1<<25) != 0, CLDEMOTE) - fs.setIf(ecx&(1<<23) != 0, KEYLOCKER) - fs.setIf(ecx&(1<<27) != 0, MOVDIRI) - fs.setIf(ecx&(1<<28) != 0, MOVDIR64B) - fs.setIf(ecx&(1<<29) != 0, ENQCMD) - fs.setIf(ecx&(1<<30) != 0, SGXLC) - - // CPUID.(EAX=7, ECX=0).EDX - fs.setIf(edx&(1<<4) != 0, FSRM) - fs.setIf(edx&(1<<9) != 0, SRBDS_CTRL) - fs.setIf(edx&(1<<10) != 0, MD_CLEAR) - fs.setIf(edx&(1<<11) != 0, RTM_ALWAYS_ABORT) - fs.setIf(edx&(1<<14) != 0, SERIALIZE) - fs.setIf(edx&(1<<15) != 0, HYBRID_CPU) - fs.setIf(edx&(1<<16) != 0, TSXLDTRK) - fs.setIf(edx&(1<<18) != 0, PCONFIG) - fs.setIf(edx&(1<<20) != 0, CETIBT) - fs.setIf(edx&(1<<26) != 0, IBPB) - fs.setIf(edx&(1<<27) != 0, STIBP) - fs.setIf(edx&(1<<28) != 0, FLUSH_L1D) - fs.setIf(edx&(1<<29) != 0, IA32_ARCH_CAP) - fs.setIf(edx&(1<<30) != 0, IA32_CORE_CAP) - fs.setIf(edx&(1<<31) != 0, SPEC_CTRL_SSBD) - - // CPUID.(EAX=7, ECX=1).EAX - eax1, _, _, edx1 := cpuidex(7, 1) - fs.setIf(fs.inSet(AVX) && eax1&(1<<4) != 0, AVXVNNI) - fs.setIf(eax1&(1<<1) != 0, SM3_X86) - fs.setIf(eax1&(1<<2) != 0, SM4_X86) - fs.setIf(eax1&(1<<7) != 0, CMPCCXADD) - fs.setIf(eax1&(1<<10) != 0, MOVSB_ZL) - fs.setIf(eax1&(1<<11) != 0, STOSB_SHORT) - fs.setIf(eax1&(1<<12) != 0, CMPSB_SCADBS_SHORT) - fs.setIf(eax1&(1<<22) != 0, HRESET) - fs.setIf(eax1&(1<<23) != 0, AVXIFMA) - fs.setIf(eax1&(1<<26) != 0, LAM) - - // CPUID.(EAX=7, ECX=1).EDX - fs.setIf(edx1&(1<<4) != 0, AVXVNNIINT8) - fs.setIf(edx1&(1<<5) != 0, AVXNECONVERT) - fs.setIf(edx1&(1<<6) != 0, AMXTRANSPOSE) - fs.setIf(edx1&(1<<7) != 0, AMXTF32) - fs.setIf(edx1&(1<<8) != 0, AMXCOMPLEX) - fs.setIf(edx1&(1<<10) != 0, AVXVNNIINT16) - fs.setIf(edx1&(1<<14) != 0, PREFETCHI) - fs.setIf(edx1&(1<<19) != 0, AVX10) - fs.setIf(edx1&(1<<21) != 0, APX_F) - - // Only detect AVX-512 features if XGETBV is supported - if c&((1<<26)|(1<<27)) == (1<<26)|(1<<27) { - // Check for OS support - eax, _ := xgetbv(0) - - // Verify that XCR0[7:5] = ‘111b’ (OPMASK state, upper 256-bit of ZMM0-ZMM15 and - // ZMM16-ZMM31 state are enabled by OS) - /// and that XCR0[2:1] = ‘11b’ (XMM state and YMM state are enabled by OS). - hasAVX512 := (eax>>5)&7 == 7 && (eax>>1)&3 == 3 - if runtime.GOOS == "darwin" { - hasAVX512 = fs.inSet(AVX) && darwinHasAVX512() - } - if hasAVX512 { - fs.setIf(ebx&(1<<16) != 0, AVX512F) - fs.setIf(ebx&(1<<17) != 0, AVX512DQ) - fs.setIf(ebx&(1<<21) != 0, AVX512IFMA) - fs.setIf(ebx&(1<<26) != 0, AVX512PF) - fs.setIf(ebx&(1<<27) != 0, AVX512ER) - fs.setIf(ebx&(1<<28) != 0, AVX512CD) - fs.setIf(ebx&(1<<30) != 0, AVX512BW) - fs.setIf(ebx&(1<<31) != 0, AVX512VL) - // ecx - fs.setIf(ecx&(1<<1) != 0, AVX512VBMI) - fs.setIf(ecx&(1<<3) != 0, AMXFP8) - fs.setIf(ecx&(1<<6) != 0, AVX512VBMI2) - fs.setIf(ecx&(1<<11) != 0, AVX512VNNI) - fs.setIf(ecx&(1<<12) != 0, AVX512BITALG) - fs.setIf(ecx&(1<<14) != 0, AVX512VPOPCNTDQ) - // edx - fs.setIf(edx&(1<<8) != 0, AVX512VP2INTERSECT) - fs.setIf(edx&(1<<22) != 0, AMXBF16) - fs.setIf(edx&(1<<23) != 0, AVX512FP16) - fs.setIf(edx&(1<<24) != 0, AMXTILE) - fs.setIf(edx&(1<<25) != 0, AMXINT8) - // eax1 = CPUID.(EAX=7, ECX=1).EAX - fs.setIf(eax1&(1<<5) != 0, AVX512BF16) - fs.setIf(eax1&(1<<19) != 0, WRMSRNS) - fs.setIf(eax1&(1<<21) != 0, AMXFP16) - fs.setIf(eax1&(1<<27) != 0, MSRLIST) - } - } - - // CPUID.(EAX=7, ECX=2) - _, _, _, edx = cpuidex(7, 2) - fs.setIf(edx&(1<<0) != 0, PSFD) - fs.setIf(edx&(1<<1) != 0, IDPRED_CTRL) - fs.setIf(edx&(1<<2) != 0, RRSBA_CTRL) - fs.setIf(edx&(1<<4) != 0, BHI_CTRL) - fs.setIf(edx&(1<<5) != 0, MCDT_NO) - - if fs.inSet(SGX) { - eax, _, _, _ := cpuidex(0x12, 0) - fs.setIf(eax&(1<<12) != 0, SGXPQC) - } - - // Add keylocker features. - if fs.inSet(KEYLOCKER) && mfi >= 0x19 { - _, ebx, _, _ := cpuidex(0x19, 0) - fs.setIf(ebx&5 == 5, KEYLOCKERW) // Bit 0 and 2 (1+4) - } - - // Add AVX10 features. - if fs.inSet(AVX10) && mfi >= 0x24 { - _, ebx, _, _ := cpuidex(0x24, 0) - fs.setIf(ebx&(1<<16) != 0, AVX10_128) - fs.setIf(ebx&(1<<17) != 0, AVX10_256) - fs.setIf(ebx&(1<<18) != 0, AVX10_512) - } - - } - - // Processor Extended State Enumeration Sub-leaf (EAX = 0DH, ECX = 1) - // EAX - // Bit 00: XSAVEOPT is available. - // Bit 01: Supports XSAVEC and the compacted form of XRSTOR if set. - // Bit 02: Supports XGETBV with ECX = 1 if set. - // Bit 03: Supports XSAVES/XRSTORS and IA32_XSS if set. - // Bits 31 - 04: Reserved. - // EBX - // Bits 31 - 00: The size in bytes of the XSAVE area containing all states enabled by XCRO | IA32_XSS. - // ECX - // Bits 31 - 00: Reports the supported bits of the lower 32 bits of the IA32_XSS MSR. IA32_XSS[n] can be set to 1 only if ECX[n] is 1. - // EDX? - // Bits 07 - 00: Used for XCR0. Bit 08: PT state. Bit 09: Used for XCR0. Bits 12 - 10: Reserved. Bit 13: HWP state. Bits 31 - 14: Reserved. - if mfi >= 0xd { - if fs.inSet(XSAVE) { - eax, _, _, _ := cpuidex(0xd, 1) - fs.setIf(eax&(1<<0) != 0, XSAVEOPT) - fs.setIf(eax&(1<<1) != 0, XSAVEC) - fs.setIf(eax&(1<<2) != 0, XGETBV1) - fs.setIf(eax&(1<<3) != 0, XSAVES) - } - } - if maxExtendedFunction() >= 0x80000001 { - _, _, c, d := cpuid(0x80000001) - if (c & (1 << 5)) != 0 { - fs.set(LZCNT) - fs.set(POPCNT) - } - // ECX - fs.setIf((c&(1<<0)) != 0, LAHF) - fs.setIf((c&(1<<2)) != 0, SVM) - fs.setIf((c&(1<<6)) != 0, SSE4A) - fs.setIf((c&(1<<10)) != 0, IBS) - fs.setIf((c&(1<<22)) != 0, TOPEXT) - - // EDX - fs.setIf(d&(1<<11) != 0, SYSCALL) - fs.setIf(d&(1<<20) != 0, NX) - fs.setIf(d&(1<<22) != 0, MMXEXT) - fs.setIf(d&(1<<23) != 0, MMX) - fs.setIf(d&(1<<24) != 0, FXSR) - fs.setIf(d&(1<<25) != 0, FXSROPT) - fs.setIf(d&(1<<27) != 0, RDTSCP) - fs.setIf(d&(1<<30) != 0, AMD3DNOWEXT) - fs.setIf(d&(1<<31) != 0, AMD3DNOW) - - /* XOP and FMA4 use the AVX instruction coding scheme, so they can't be - * used unless the OS has AVX support. */ - if fs.inSet(AVX) { - fs.setIf((c&(1<<11)) != 0, XOP) - fs.setIf((c&(1<<16)) != 0, FMA4) - } - - } - if maxExtendedFunction() >= 0x80000007 { - _, b, _, d := cpuid(0x80000007) - fs.setIf((b&(1<<0)) != 0, MCAOVERFLOW) - fs.setIf((b&(1<<1)) != 0, SUCCOR) - fs.setIf((b&(1<<2)) != 0, HWA) - fs.setIf((d&(1<<9)) != 0, CPBOOST) - } - - if maxExtendedFunction() >= 0x80000008 { - _, b, _, _ := cpuid(0x80000008) - fs.setIf(b&(1<<28) != 0, PSFD) - fs.setIf(b&(1<<27) != 0, CPPC) - fs.setIf(b&(1<<24) != 0, SPEC_CTRL_SSBD) - fs.setIf(b&(1<<23) != 0, PPIN) - fs.setIf(b&(1<<21) != 0, TLB_FLUSH_NESTED) - fs.setIf(b&(1<<20) != 0, EFER_LMSLE_UNS) - fs.setIf(b&(1<<19) != 0, IBRS_PROVIDES_SMP) - fs.setIf(b&(1<<18) != 0, IBRS_PREFERRED) - fs.setIf(b&(1<<17) != 0, STIBP_ALWAYSON) - fs.setIf(b&(1<<15) != 0, STIBP) - fs.setIf(b&(1<<14) != 0, IBRS) - fs.setIf((b&(1<<13)) != 0, INT_WBINVD) - fs.setIf(b&(1<<12) != 0, IBPB) - fs.setIf((b&(1<<9)) != 0, WBNOINVD) - fs.setIf((b&(1<<8)) != 0, MCOMMIT) - fs.setIf((b&(1<<4)) != 0, RDPRU) - fs.setIf((b&(1<<3)) != 0, INVLPGB) - fs.setIf((b&(1<<1)) != 0, MSRIRC) - fs.setIf((b&(1<<0)) != 0, CLZERO) - } - - if fs.inSet(SVM) && maxExtendedFunction() >= 0x8000000A { - _, _, _, edx := cpuid(0x8000000A) - fs.setIf((edx>>0)&1 == 1, SVMNP) - fs.setIf((edx>>1)&1 == 1, LBRVIRT) - fs.setIf((edx>>2)&1 == 1, SVML) - fs.setIf((edx>>3)&1 == 1, NRIPS) - fs.setIf((edx>>4)&1 == 1, TSCRATEMSR) - fs.setIf((edx>>5)&1 == 1, VMCBCLEAN) - fs.setIf((edx>>6)&1 == 1, SVMFBASID) - fs.setIf((edx>>7)&1 == 1, SVMDA) - fs.setIf((edx>>10)&1 == 1, SVMPF) - fs.setIf((edx>>12)&1 == 1, SVMPFT) - } - - if maxExtendedFunction() >= 0x8000001a { - eax, _, _, _ := cpuid(0x8000001a) - fs.setIf((eax>>0)&1 == 1, FP128) - fs.setIf((eax>>1)&1 == 1, MOVU) - fs.setIf((eax>>2)&1 == 1, FP256) - } - - if maxExtendedFunction() >= 0x8000001b && fs.inSet(IBS) { - eax, _, _, _ := cpuid(0x8000001b) - fs.setIf((eax>>0)&1 == 1, IBSFFV) - fs.setIf((eax>>1)&1 == 1, IBSFETCHSAM) - fs.setIf((eax>>2)&1 == 1, IBSOPSAM) - fs.setIf((eax>>3)&1 == 1, IBSRDWROPCNT) - fs.setIf((eax>>4)&1 == 1, IBSOPCNT) - fs.setIf((eax>>5)&1 == 1, IBSBRNTRGT) - fs.setIf((eax>>6)&1 == 1, IBSOPCNTEXT) - fs.setIf((eax>>7)&1 == 1, IBSRIPINVALIDCHK) - fs.setIf((eax>>8)&1 == 1, IBS_OPFUSE) - fs.setIf((eax>>9)&1 == 1, IBS_FETCH_CTLX) - fs.setIf((eax>>10)&1 == 1, IBS_OPDATA4) // Doc says "Fixed,0. IBS op data 4 MSR supported", but assuming they mean 1. - fs.setIf((eax>>11)&1 == 1, IBS_ZEN4) - } - - if maxExtendedFunction() >= 0x8000001f && vend == AMD { - a, _, _, _ := cpuid(0x8000001f) - fs.setIf((a>>0)&1 == 1, SME) - fs.setIf((a>>1)&1 == 1, SEV) - fs.setIf((a>>2)&1 == 1, MSR_PAGEFLUSH) - fs.setIf((a>>3)&1 == 1, SEV_ES) - fs.setIf((a>>4)&1 == 1, SEV_SNP) - fs.setIf((a>>5)&1 == 1, VMPL) - fs.setIf((a>>10)&1 == 1, SME_COHERENT) - fs.setIf((a>>11)&1 == 1, SEV_64BIT) - fs.setIf((a>>12)&1 == 1, SEV_RESTRICTED) - fs.setIf((a>>13)&1 == 1, SEV_ALTERNATIVE) - fs.setIf((a>>14)&1 == 1, SEV_DEBUGSWAP) - fs.setIf((a>>15)&1 == 1, IBS_PREVENTHOST) - fs.setIf((a>>16)&1 == 1, VTE) - fs.setIf((a>>24)&1 == 1, VMSA_REGPROT) - } - - if maxExtendedFunction() >= 0x80000021 && vend == AMD { - a, _, c, _ := cpuid(0x80000021) - fs.setIf((a>>31)&1 == 1, SRSO_MSR_FIX) - fs.setIf((a>>30)&1 == 1, SRSO_USER_KERNEL_NO) - fs.setIf((a>>29)&1 == 1, SRSO_NO) - fs.setIf((a>>28)&1 == 1, IBPB_BRTYPE) - fs.setIf((a>>27)&1 == 1, SBPB) - fs.setIf((c>>1)&1 == 1, TSA_L1_NO) - fs.setIf((c>>2)&1 == 1, TSA_SQ_NO) - fs.setIf((a>>5)&1 == 1, TSA_VERW_CLEAR) - } - if vend == AMD { - if family < 0x19 { - // AMD CPUs that are older than Family 19h are not vulnerable to TSA but do not set TSA_L1_NO or TSA_SQ_NO. - // Source: https://www.amd.com/content/dam/amd/en/documents/resources/bulletin/technical-guidance-for-mitigating-transient-scheduler-attacks.pdf - fs.set(TSA_L1_NO) - fs.set(TSA_SQ_NO) - } else if family == 0x1a { - // AMD Family 1Ah models 00h-4Fh and 60h-7Fh are also not vulnerable to TSA but do not set TSA_L1_NO or TSA_SQ_NO. - // Future AMD CPUs will set these CPUID bits if appropriate. CPUs will be designed to set these CPUID bits if appropriate. - notVuln := model <= 0x4f || (model >= 0x60 && model <= 0x7f) - fs.setIf(notVuln, TSA_L1_NO, TSA_SQ_NO) - } - } - - if mfi >= 0x20 { - // Microsoft has decided to purposefully hide the information - // of the guest TEE when VMs are being created using Hyper-V. - // - // This leads us to check for the Hyper-V cpuid features - // (0x4000000C), and then for the `ebx` value set. - // - // For Intel TDX, `ebx` is set as `0xbe3`, being 3 the part - // we're mostly interested about,according to: - // https://github.com/torvalds/linux/blob/d2f51b3516dade79269ff45eae2a7668ae711b25/arch/x86/include/asm/hyperv-tlfs.h#L169-L174 - _, ebx, _, _ := cpuid(0x4000000C) - fs.setIf(ebx == 0xbe3, TDX_GUEST) - } - - if mfi >= 0x21 { - // Intel Trusted Domain Extensions Guests have their own cpuid leaf (0x21). - _, ebx, ecx, edx := cpuid(0x21) - identity := string(valAsString(ebx, edx, ecx)) - fs.setIf(identity == "IntelTDX ", TDX_GUEST) - } - - return fs -} - -func (c *CPUInfo) supportAVX10() uint8 { - if c.maxFunc >= 0x24 && c.featureSet.inSet(AVX10) { - _, ebx, _, _ := cpuidex(0x24, 0) - return uint8(ebx) - } - return 0 -} - -func valAsString(values ...uint32) []byte { - r := make([]byte, 4*len(values)) - for i, v := range values { - dst := r[i*4:] - dst[0] = byte(v & 0xff) - dst[1] = byte((v >> 8) & 0xff) - dst[2] = byte((v >> 16) & 0xff) - dst[3] = byte((v >> 24) & 0xff) - switch { - case dst[0] == 0: - return r[:i*4] - case dst[1] == 0: - return r[:i*4+1] - case dst[2] == 0: - return r[:i*4+2] - case dst[3] == 0: - return r[:i*4+3] - } - } - return r -} - -func parseLeaf0AH(c *CPUInfo, eax, ebx, edx uint32) (info PerformanceMonitoringInfo) { - info.VersionID = uint8(eax & 0xFF) - info.NumGPCounters = uint8((eax >> 8) & 0xFF) - info.GPPMCWidth = uint8((eax >> 16) & 0xFF) - - info.RawEBX = ebx - info.RawEAX = eax - info.RawEDX = edx - - if info.VersionID > 1 { // This information is only valid if VersionID > 1 - info.NumFixedPMC = uint8(edx & 0x1F) // Bits 4:0 - info.FixedPMCWidth = uint8((edx >> 5) & 0xFF) // Bits 12:5 - } - if info.VersionID > 0 { - // first 4 fixed events are always instructions retired, cycles, ref cycles and topdown slots - if ebx == 0x0 && info.NumFixedPMC == 3 { - c.featureSet.set(PMU_FIXEDCOUNTER_INSTRUCTIONS) - c.featureSet.set(PMU_FIXEDCOUNTER_CYCLES) - c.featureSet.set(PMU_FIXEDCOUNTER_REFCYCLES) - } - if ebx == 0x0 && info.NumFixedPMC == 4 { - c.featureSet.set(PMU_FIXEDCOUNTER_INSTRUCTIONS) - c.featureSet.set(PMU_FIXEDCOUNTER_CYCLES) - c.featureSet.set(PMU_FIXEDCOUNTER_REFCYCLES) - c.featureSet.set(PMU_FIXEDCOUNTER_TOPDOWN_SLOTS) - } - if ebx != 0x0 { - if ((ebx >> 0) & 1) == 0 { - c.featureSet.set(PMU_FIXEDCOUNTER_INSTRUCTIONS) - } - if ((ebx >> 1) & 1) == 0 { - c.featureSet.set(PMU_FIXEDCOUNTER_CYCLES) - } - if ((ebx >> 2) & 1) == 0 { - c.featureSet.set(PMU_FIXEDCOUNTER_REFCYCLES) - } - if ((ebx >> 3) & 1) == 0 { - c.featureSet.set(PMU_FIXEDCOUNTER_TOPDOWN_SLOTS) - } - } - } - return info -} diff --git a/vendor/github.com/klauspost/cpuid/v2/cpuid_386.s b/vendor/github.com/klauspost/cpuid/v2/cpuid_386.s deleted file mode 100644 index 8587c3a1..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/cpuid_386.s +++ /dev/null @@ -1,47 +0,0 @@ -// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file. - -//+build 386,!gccgo,!noasm,!appengine - -// func asmCpuid(op uint32) (eax, ebx, ecx, edx uint32) -TEXT ·asmCpuid(SB), 7, $0 - XORL CX, CX - MOVL op+0(FP), AX - CPUID - MOVL AX, eax+4(FP) - MOVL BX, ebx+8(FP) - MOVL CX, ecx+12(FP) - MOVL DX, edx+16(FP) - RET - -// func asmCpuidex(op, op2 uint32) (eax, ebx, ecx, edx uint32) -TEXT ·asmCpuidex(SB), 7, $0 - MOVL op+0(FP), AX - MOVL op2+4(FP), CX - CPUID - MOVL AX, eax+8(FP) - MOVL BX, ebx+12(FP) - MOVL CX, ecx+16(FP) - MOVL DX, edx+20(FP) - RET - -// func xgetbv(index uint32) (eax, edx uint32) -TEXT ·asmXgetbv(SB), 7, $0 - MOVL index+0(FP), CX - BYTE $0x0f; BYTE $0x01; BYTE $0xd0 // XGETBV - MOVL AX, eax+4(FP) - MOVL DX, edx+8(FP) - RET - -// func asmRdtscpAsm() (eax, ebx, ecx, edx uint32) -TEXT ·asmRdtscpAsm(SB), 7, $0 - BYTE $0x0F; BYTE $0x01; BYTE $0xF9 // RDTSCP - MOVL AX, eax+0(FP) - MOVL BX, ebx+4(FP) - MOVL CX, ecx+8(FP) - MOVL DX, edx+12(FP) - RET - -// func asmDarwinHasAVX512() bool -TEXT ·asmDarwinHasAVX512(SB), 7, $0 - MOVL $0, eax+0(FP) - RET diff --git a/vendor/github.com/klauspost/cpuid/v2/cpuid_amd64.s b/vendor/github.com/klauspost/cpuid/v2/cpuid_amd64.s deleted file mode 100644 index bc11f894..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/cpuid_amd64.s +++ /dev/null @@ -1,72 +0,0 @@ -// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file. - -//+build amd64,!gccgo,!noasm,!appengine - -// func asmCpuid(op uint32) (eax, ebx, ecx, edx uint32) -TEXT ·asmCpuid(SB), 7, $0 - XORQ CX, CX - MOVL op+0(FP), AX - CPUID - MOVL AX, eax+8(FP) - MOVL BX, ebx+12(FP) - MOVL CX, ecx+16(FP) - MOVL DX, edx+20(FP) - RET - -// func asmCpuidex(op, op2 uint32) (eax, ebx, ecx, edx uint32) -TEXT ·asmCpuidex(SB), 7, $0 - MOVL op+0(FP), AX - MOVL op2+4(FP), CX - CPUID - MOVL AX, eax+8(FP) - MOVL BX, ebx+12(FP) - MOVL CX, ecx+16(FP) - MOVL DX, edx+20(FP) - RET - -// func asmXgetbv(index uint32) (eax, edx uint32) -TEXT ·asmXgetbv(SB), 7, $0 - MOVL index+0(FP), CX - BYTE $0x0f; BYTE $0x01; BYTE $0xd0 // XGETBV - MOVL AX, eax+8(FP) - MOVL DX, edx+12(FP) - RET - -// func asmRdtscpAsm() (eax, ebx, ecx, edx uint32) -TEXT ·asmRdtscpAsm(SB), 7, $0 - BYTE $0x0F; BYTE $0x01; BYTE $0xF9 // RDTSCP - MOVL AX, eax+0(FP) - MOVL BX, ebx+4(FP) - MOVL CX, ecx+8(FP) - MOVL DX, edx+12(FP) - RET - -// From https://go-review.googlesource.com/c/sys/+/285572/ -// func asmDarwinHasAVX512() bool -TEXT ·asmDarwinHasAVX512(SB), 7, $0-1 - MOVB $0, ret+0(FP) // default to false - -#ifdef GOOS_darwin // return if not darwin -#ifdef GOARCH_amd64 // return if not amd64 -// These values from: -// https://github.com/apple/darwin-xnu/blob/xnu-4570.1.46/osfmk/i386/cpu_capabilities.h -#define commpage64_base_address 0x00007fffffe00000 -#define commpage64_cpu_capabilities64 (commpage64_base_address+0x010) -#define commpage64_version (commpage64_base_address+0x01E) -#define hasAVX512F 0x0000004000000000 - MOVQ $commpage64_version, BX - MOVW (BX), AX - CMPW AX, $13 // versions < 13 do not support AVX512 - JL no_avx512 - MOVQ $commpage64_cpu_capabilities64, BX - MOVQ (BX), AX - MOVQ $hasAVX512F, CX - ANDQ CX, AX - JZ no_avx512 - MOVB $1, ret+0(FP) - -no_avx512: -#endif -#endif - RET - diff --git a/vendor/github.com/klauspost/cpuid/v2/cpuid_arm64.s b/vendor/github.com/klauspost/cpuid/v2/cpuid_arm64.s deleted file mode 100644 index b196f78e..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/cpuid_arm64.s +++ /dev/null @@ -1,36 +0,0 @@ -// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file. - -//+build arm64,!gccgo,!noasm,!appengine - -// See https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt - -// func getMidr -TEXT ·getMidr(SB), 7, $0 - WORD $0xd5380000 // mrs x0, midr_el1 /* Main ID Register */ - MOVD R0, midr+0(FP) - RET - -// func getProcFeatures -TEXT ·getProcFeatures(SB), 7, $0 - WORD $0xd5380400 // mrs x0, id_aa64pfr0_el1 /* Processor Feature Register 0 */ - MOVD R0, procFeatures+0(FP) - RET - -// func getInstAttributes -TEXT ·getInstAttributes(SB), 7, $0 - WORD $0xd5380600 // mrs x0, id_aa64isar0_el1 /* Instruction Set Attribute Register 0 */ - WORD $0xd5380621 // mrs x1, id_aa64isar1_el1 /* Instruction Set Attribute Register 1 */ - MOVD R0, instAttrReg0+0(FP) - MOVD R1, instAttrReg1+8(FP) - RET - -TEXT ·getVectorLength(SB), 7, $0 - WORD $0xd2800002 // mov x2, #0 - WORD $0x04225022 // addvl x2, x2, #1 - WORD $0xd37df042 // lsl x2, x2, #3 - WORD $0xd2800003 // mov x3, #0 - WORD $0x04635023 // addpl x3, x3, #1 - WORD $0xd37df063 // lsl x3, x3, #3 - MOVD R2, vl+0(FP) - MOVD R3, pl+8(FP) - RET diff --git a/vendor/github.com/klauspost/cpuid/v2/detect_arm64.go b/vendor/github.com/klauspost/cpuid/v2/detect_arm64.go deleted file mode 100644 index 9ae32d60..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/detect_arm64.go +++ /dev/null @@ -1,250 +0,0 @@ -// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file. - -//go:build arm64 && !gccgo && !noasm && !appengine -// +build arm64,!gccgo,!noasm,!appengine - -package cpuid - -import "runtime" - -func getMidr() (midr uint64) -func getProcFeatures() (procFeatures uint64) -func getInstAttributes() (instAttrReg0, instAttrReg1 uint64) -func getVectorLength() (vl, pl uint64) - -func initCPU() { - cpuid = func(uint32) (a, b, c, d uint32) { return 0, 0, 0, 0 } - cpuidex = func(x, y uint32) (a, b, c, d uint32) { return 0, 0, 0, 0 } - xgetbv = func(uint32) (a, b uint32) { return 0, 0 } - rdtscpAsm = func() (a, b, c, d uint32) { return 0, 0, 0, 0 } -} - -func addInfo(c *CPUInfo, safe bool) { - // Seems to be safe to assume on ARM64 - c.CacheLine = 64 - detectOS(c) - - // ARM64 disabled since it may crash if interrupt is not intercepted by OS. - if safe && !c.Has(ARMCPUID) && runtime.GOOS != "freebsd" { - return - } - midr := getMidr() - - // MIDR_EL1 - Main ID Register - // https://developer.arm.com/docs/ddi0595/h/aarch64-system-registers/midr_el1 - // x--------------------------------------------------x - // | Name | bits | visible | - // |--------------------------------------------------| - // | Implementer | [31-24] | y | - // |--------------------------------------------------| - // | Variant | [23-20] | y | - // |--------------------------------------------------| - // | Architecture | [19-16] | y | - // |--------------------------------------------------| - // | PartNum | [15-4] | y | - // |--------------------------------------------------| - // | Revision | [3-0] | y | - // x--------------------------------------------------x - - switch (midr >> 24) & 0xff { - case 0xC0: - c.VendorString = "Ampere Computing" - c.VendorID = Ampere - case 0x41: - c.VendorString = "Arm Limited" - c.VendorID = ARM - case 0x42: - c.VendorString = "Broadcom Corporation" - c.VendorID = Broadcom - case 0x43: - c.VendorString = "Cavium Inc" - c.VendorID = Cavium - case 0x44: - c.VendorString = "Digital Equipment Corporation" - c.VendorID = DEC - case 0x46: - c.VendorString = "Fujitsu Ltd" - c.VendorID = Fujitsu - case 0x49: - c.VendorString = "Infineon Technologies AG" - c.VendorID = Infineon - case 0x4D: - c.VendorString = "Motorola or Freescale Semiconductor Inc" - c.VendorID = Motorola - case 0x4E: - c.VendorString = "NVIDIA Corporation" - c.VendorID = NVIDIA - case 0x50: - c.VendorString = "Applied Micro Circuits Corporation" - c.VendorID = AMCC - case 0x51: - c.VendorString = "Qualcomm Inc" - c.VendorID = Qualcomm - case 0x56: - c.VendorString = "Marvell International Ltd" - c.VendorID = Marvell - case 0x69: - c.VendorString = "Intel Corporation" - c.VendorID = Intel - } - - // Lower 4 bits: Architecture - // Architecture Meaning - // 0b0001 Armv4. - // 0b0010 Armv4T. - // 0b0011 Armv5 (obsolete). - // 0b0100 Armv5T. - // 0b0101 Armv5TE. - // 0b0110 Armv5TEJ. - // 0b0111 Armv6. - // 0b1111 Architectural features are individually identified in the ID_* registers, see 'ID registers'. - // Upper 4 bit: Variant - // An IMPLEMENTATION DEFINED variant number. - // Typically, this field is used to distinguish between different product variants, or major revisions of a product. - c.Family = int(midr>>16) & 0xff - - // PartNum, bits [15:4] - // An IMPLEMENTATION DEFINED primary part number for the device. - // On processors implemented by Arm, if the top four bits of the primary - // part number are 0x0 or 0x7, the variant and architecture are encoded differently. - // Revision, bits [3:0] - // An IMPLEMENTATION DEFINED revision number for the device. - c.Model = int(midr) & 0xffff - - procFeatures := getProcFeatures() - - // ID_AA64PFR0_EL1 - Processor Feature Register 0 - // x--------------------------------------------------x - // | Name | bits | visible | - // |--------------------------------------------------| - // | DIT | [51-48] | y | - // |--------------------------------------------------| - // | SVE | [35-32] | y | - // |--------------------------------------------------| - // | GIC | [27-24] | n | - // |--------------------------------------------------| - // | AdvSIMD | [23-20] | y | - // |--------------------------------------------------| - // | FP | [19-16] | y | - // |--------------------------------------------------| - // | EL3 | [15-12] | n | - // |--------------------------------------------------| - // | EL2 | [11-8] | n | - // |--------------------------------------------------| - // | EL1 | [7-4] | n | - // |--------------------------------------------------| - // | EL0 | [3-0] | n | - // x--------------------------------------------------x - - var f flagSet - // if procFeatures&(0xf<<48) != 0 { - // fmt.Println("DIT") - // } - f.setIf(procFeatures&(0xf<<32) != 0, SVE) - if procFeatures&(0xf<<20) != 15<<20 { - f.set(ASIMD) - // https://developer.arm.com/docs/ddi0595/b/aarch64-system-registers/id_aa64pfr0_el1 - // 0b0001 --> As for 0b0000, and also includes support for half-precision floating-point arithmetic. - f.setIf(procFeatures&(0xf<<20) == 1<<20, FPHP, ASIMDHP) - } - f.setIf(procFeatures&(0xf<<16) != 0, FP) - - instAttrReg0, instAttrReg1 := getInstAttributes() - - // https://developer.arm.com/docs/ddi0595/b/aarch64-system-registers/id_aa64isar0_el1 - // - // ID_AA64ISAR0_EL1 - Instruction Set Attribute Register 0 - // x--------------------------------------------------x - // | Name | bits | visible | - // |--------------------------------------------------| - // | RNDR | [63-60] | y | - // |--------------------------------------------------| - // | TLB | [59-56] | y | - // |--------------------------------------------------| - // | TS | [55-52] | y | - // |--------------------------------------------------| - // | FHM | [51-48] | y | - // |--------------------------------------------------| - // | DP | [47-44] | y | - // |--------------------------------------------------| - // | SM4 | [43-40] | y | - // |--------------------------------------------------| - // | SM3 | [39-36] | y | - // |--------------------------------------------------| - // | SHA3 | [35-32] | y | - // |--------------------------------------------------| - // | RDM | [31-28] | y | - // |--------------------------------------------------| - // | ATOMICS | [23-20] | y | - // |--------------------------------------------------| - // | CRC32 | [19-16] | y | - // |--------------------------------------------------| - // | SHA2 | [15-12] | y | - // |--------------------------------------------------| - // | SHA1 | [11-8] | y | - // |--------------------------------------------------| - // | AES | [7-4] | y | - // x--------------------------------------------------x - - f.setIf(instAttrReg0&(0xf<<60) != 0, RNDR) - f.setIf(instAttrReg0&(0xf<<56) != 0, TLB) - f.setIf(instAttrReg0&(0xf<<52) != 0, TS) - f.setIf(instAttrReg0&(0xf<<48) != 0, FHM) - f.setIf(instAttrReg0&(0xf<<44) != 0, ASIMDDP) - f.setIf(instAttrReg0&(0xf<<40) != 0, SM4) - f.setIf(instAttrReg0&(0xf<<36) != 0, SM3) - f.setIf(instAttrReg0&(0xf<<32) != 0, SHA3) - f.setIf(instAttrReg0&(0xf<<28) != 0, ASIMDRDM) - f.setIf(instAttrReg0&(0xf<<20) != 0, ATOMICS) - f.setIf(instAttrReg0&(0xf<<16) != 0, CRC32) - f.setIf(instAttrReg0&(0xf<<12) != 0, SHA2) - // https://developer.arm.com/docs/ddi0595/b/aarch64-system-registers/id_aa64isar0_el1 - // 0b0010 --> As 0b0001, plus SHA512H, SHA512H2, SHA512SU0, and SHA512SU1 instructions implemented. - f.setIf(instAttrReg0&(0xf<<12) == 2<<12, SHA512) - f.setIf(instAttrReg0&(0xf<<8) != 0, SHA1) - f.setIf(instAttrReg0&(0xf<<4) != 0, AESARM) - // https://developer.arm.com/docs/ddi0595/b/aarch64-system-registers/id_aa64isar0_el1 - // 0b0010 --> As for 0b0001, plus PMULL/PMULL2 instructions operating on 64-bit data quantities. - f.setIf(instAttrReg0&(0xf<<4) == 2<<4, PMULL) - - // https://developer.arm.com/docs/ddi0595/b/aarch64-system-registers/id_aa64isar1_el1 - // - // ID_AA64ISAR1_EL1 - Instruction set attribute register 1 - // x--------------------------------------------------x - // | Name | bits | visible | - // |--------------------------------------------------| - // | GPI | [31-28] | y | - // |--------------------------------------------------| - // | GPA | [27-24] | y | - // |--------------------------------------------------| - // | LRCPC | [23-20] | y | - // |--------------------------------------------------| - // | FCMA | [19-16] | y | - // |--------------------------------------------------| - // | JSCVT | [15-12] | y | - // |--------------------------------------------------| - // | API | [11-8] | y | - // |--------------------------------------------------| - // | APA | [7-4] | y | - // |--------------------------------------------------| - // | DPB | [3-0] | y | - // x--------------------------------------------------x - - // if instAttrReg1&(0xf<<28) != 0 { - // fmt.Println("GPI") - // } - f.setIf(instAttrReg1&(0xf<<28) != 24, GPA) - f.setIf(instAttrReg1&(0xf<<20) != 0, LRCPC) - f.setIf(instAttrReg1&(0xf<<16) != 0, FCMA) - f.setIf(instAttrReg1&(0xf<<12) != 0, JSCVT) - // if instAttrReg1&(0xf<<8) != 0 { - // fmt.Println("API") - // } - // if instAttrReg1&(0xf<<4) != 0 { - // fmt.Println("APA") - // } - f.setIf(instAttrReg1&(0xf<<0) != 0, DCPOP) - - // Store - c.featureSet.or(f) -} diff --git a/vendor/github.com/klauspost/cpuid/v2/detect_ref.go b/vendor/github.com/klauspost/cpuid/v2/detect_ref.go deleted file mode 100644 index 574f9389..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/detect_ref.go +++ /dev/null @@ -1,17 +0,0 @@ -// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file. - -//go:build (!amd64 && !386 && !arm64) || gccgo || noasm || appengine -// +build !amd64,!386,!arm64 gccgo noasm appengine - -package cpuid - -func initCPU() { - cpuid = func(uint32) (a, b, c, d uint32) { return 0, 0, 0, 0 } - cpuidex = func(x, y uint32) (a, b, c, d uint32) { return 0, 0, 0, 0 } - xgetbv = func(uint32) (a, b uint32) { return 0, 0 } - rdtscpAsm = func() (a, b, c, d uint32) { return 0, 0, 0, 0 } - -} - -func addInfo(info *CPUInfo, safe bool) {} -func getVectorLength() (vl, pl uint64) { return 0, 0 } diff --git a/vendor/github.com/klauspost/cpuid/v2/detect_x86.go b/vendor/github.com/klauspost/cpuid/v2/detect_x86.go deleted file mode 100644 index 14a56b93..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/detect_x86.go +++ /dev/null @@ -1,45 +0,0 @@ -// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file. - -//go:build (386 && !gccgo && !noasm && !appengine) || (amd64 && !gccgo && !noasm && !appengine) -// +build 386,!gccgo,!noasm,!appengine amd64,!gccgo,!noasm,!appengine - -package cpuid - -func asmCpuid(op uint32) (eax, ebx, ecx, edx uint32) -func asmCpuidex(op, op2 uint32) (eax, ebx, ecx, edx uint32) -func asmXgetbv(index uint32) (eax, edx uint32) -func asmRdtscpAsm() (eax, ebx, ecx, edx uint32) -func asmDarwinHasAVX512() bool - -func initCPU() { - cpuid = asmCpuid - cpuidex = asmCpuidex - xgetbv = asmXgetbv - rdtscpAsm = asmRdtscpAsm - darwinHasAVX512 = asmDarwinHasAVX512 -} - -func addInfo(c *CPUInfo, safe bool) { - c.maxFunc = maxFunctionID() - c.maxExFunc = maxExtendedFunction() - c.BrandName = brandName() - c.CacheLine = cacheLine() - c.Family, c.Model, c.Stepping = familyModel() - c.featureSet = support() - c.SGX = hasSGX(c.featureSet.inSet(SGX), c.featureSet.inSet(SGXLC)) - c.AMDMemEncryption = hasAMDMemEncryption(c.featureSet.inSet(SME) || c.featureSet.inSet(SEV)) - c.ThreadsPerCore = threadsPerCore() - c.LogicalCores = logicalCores() - c.PhysicalCores = physicalCores() - c.VendorID, c.VendorString = vendorID() - c.HypervisorVendorID, c.HypervisorVendorString = hypervisorVendorID() - c.AVX10Level = c.supportAVX10() - c.cacheSize() - c.frequencies() - if c.maxFunc >= 0x0A { - eax, ebx, _, edx := cpuid(0x0A) - c.PMU = parseLeaf0AH(c, eax, ebx, edx) - } -} - -func getVectorLength() (vl, pl uint64) { return 0, 0 } diff --git a/vendor/github.com/klauspost/cpuid/v2/featureid_string.go b/vendor/github.com/klauspost/cpuid/v2/featureid_string.go deleted file mode 100644 index 2888bae8..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/featureid_string.go +++ /dev/null @@ -1,308 +0,0 @@ -// Code generated by "stringer -type=FeatureID,Vendor"; DO NOT EDIT. - -package cpuid - -import "strconv" - -func _() { - // An "invalid array index" compiler error signifies that the constant values have changed. - // Re-run the stringer command to generate them again. - var x [1]struct{} - _ = x[ADX-1] - _ = x[AESNI-2] - _ = x[AMD3DNOW-3] - _ = x[AMD3DNOWEXT-4] - _ = x[AMXBF16-5] - _ = x[AMXFP16-6] - _ = x[AMXINT8-7] - _ = x[AMXFP8-8] - _ = x[AMXTILE-9] - _ = x[AMXTF32-10] - _ = x[AMXCOMPLEX-11] - _ = x[AMXTRANSPOSE-12] - _ = x[APX_F-13] - _ = x[AVX-14] - _ = x[AVX10-15] - _ = x[AVX10_128-16] - _ = x[AVX10_256-17] - _ = x[AVX10_512-18] - _ = x[AVX2-19] - _ = x[AVX512BF16-20] - _ = x[AVX512BITALG-21] - _ = x[AVX512BW-22] - _ = x[AVX512CD-23] - _ = x[AVX512DQ-24] - _ = x[AVX512ER-25] - _ = x[AVX512F-26] - _ = x[AVX512FP16-27] - _ = x[AVX512IFMA-28] - _ = x[AVX512PF-29] - _ = x[AVX512VBMI-30] - _ = x[AVX512VBMI2-31] - _ = x[AVX512VL-32] - _ = x[AVX512VNNI-33] - _ = x[AVX512VP2INTERSECT-34] - _ = x[AVX512VPOPCNTDQ-35] - _ = x[AVXIFMA-36] - _ = x[AVXNECONVERT-37] - _ = x[AVXSLOW-38] - _ = x[AVXVNNI-39] - _ = x[AVXVNNIINT8-40] - _ = x[AVXVNNIINT16-41] - _ = x[BHI_CTRL-42] - _ = x[BMI1-43] - _ = x[BMI2-44] - _ = x[CETIBT-45] - _ = x[CETSS-46] - _ = x[CLDEMOTE-47] - _ = x[CLMUL-48] - _ = x[CLZERO-49] - _ = x[CMOV-50] - _ = x[CMPCCXADD-51] - _ = x[CMPSB_SCADBS_SHORT-52] - _ = x[CMPXCHG8-53] - _ = x[CPBOOST-54] - _ = x[CPPC-55] - _ = x[CX16-56] - _ = x[EFER_LMSLE_UNS-57] - _ = x[ENQCMD-58] - _ = x[ERMS-59] - _ = x[F16C-60] - _ = x[FLUSH_L1D-61] - _ = x[FMA3-62] - _ = x[FMA4-63] - _ = x[FP128-64] - _ = x[FP256-65] - _ = x[FSRM-66] - _ = x[FXSR-67] - _ = x[FXSROPT-68] - _ = x[GFNI-69] - _ = x[HLE-70] - _ = x[HRESET-71] - _ = x[HTT-72] - _ = x[HWA-73] - _ = x[HYBRID_CPU-74] - _ = x[HYPERVISOR-75] - _ = x[IA32_ARCH_CAP-76] - _ = x[IA32_CORE_CAP-77] - _ = x[IBPB-78] - _ = x[IBPB_BRTYPE-79] - _ = x[IBRS-80] - _ = x[IBRS_PREFERRED-81] - _ = x[IBRS_PROVIDES_SMP-82] - _ = x[IBS-83] - _ = x[IBSBRNTRGT-84] - _ = x[IBSFETCHSAM-85] - _ = x[IBSFFV-86] - _ = x[IBSOPCNT-87] - _ = x[IBSOPCNTEXT-88] - _ = x[IBSOPSAM-89] - _ = x[IBSRDWROPCNT-90] - _ = x[IBSRIPINVALIDCHK-91] - _ = x[IBS_FETCH_CTLX-92] - _ = x[IBS_OPDATA4-93] - _ = x[IBS_OPFUSE-94] - _ = x[IBS_PREVENTHOST-95] - _ = x[IBS_ZEN4-96] - _ = x[IDPRED_CTRL-97] - _ = x[INT_WBINVD-98] - _ = x[INVLPGB-99] - _ = x[KEYLOCKER-100] - _ = x[KEYLOCKERW-101] - _ = x[LAHF-102] - _ = x[LAM-103] - _ = x[LBRVIRT-104] - _ = x[LZCNT-105] - _ = x[MCAOVERFLOW-106] - _ = x[MCDT_NO-107] - _ = x[MCOMMIT-108] - _ = x[MD_CLEAR-109] - _ = x[MMX-110] - _ = x[MMXEXT-111] - _ = x[MOVBE-112] - _ = x[MOVDIR64B-113] - _ = x[MOVDIRI-114] - _ = x[MOVSB_ZL-115] - _ = x[MOVU-116] - _ = x[MPX-117] - _ = x[MSRIRC-118] - _ = x[MSRLIST-119] - _ = x[MSR_PAGEFLUSH-120] - _ = x[NRIPS-121] - _ = x[NX-122] - _ = x[OSXSAVE-123] - _ = x[PCONFIG-124] - _ = x[POPCNT-125] - _ = x[PPIN-126] - _ = x[PREFETCHI-127] - _ = x[PSFD-128] - _ = x[RDPRU-129] - _ = x[RDRAND-130] - _ = x[RDSEED-131] - _ = x[RDTSCP-132] - _ = x[RRSBA_CTRL-133] - _ = x[RTM-134] - _ = x[RTM_ALWAYS_ABORT-135] - _ = x[SBPB-136] - _ = x[SERIALIZE-137] - _ = x[SEV-138] - _ = x[SEV_64BIT-139] - _ = x[SEV_ALTERNATIVE-140] - _ = x[SEV_DEBUGSWAP-141] - _ = x[SEV_ES-142] - _ = x[SEV_RESTRICTED-143] - _ = x[SEV_SNP-144] - _ = x[SGX-145] - _ = x[SGXLC-146] - _ = x[SGXPQC-147] - _ = x[SHA-148] - _ = x[SME-149] - _ = x[SME_COHERENT-150] - _ = x[SM3_X86-151] - _ = x[SM4_X86-152] - _ = x[SPEC_CTRL_SSBD-153] - _ = x[SRBDS_CTRL-154] - _ = x[SRSO_MSR_FIX-155] - _ = x[SRSO_NO-156] - _ = x[SRSO_USER_KERNEL_NO-157] - _ = x[SSE-158] - _ = x[SSE2-159] - _ = x[SSE3-160] - _ = x[SSE4-161] - _ = x[SSE42-162] - _ = x[SSE4A-163] - _ = x[SSSE3-164] - _ = x[STIBP-165] - _ = x[STIBP_ALWAYSON-166] - _ = x[STOSB_SHORT-167] - _ = x[SUCCOR-168] - _ = x[SVM-169] - _ = x[SVMDA-170] - _ = x[SVMFBASID-171] - _ = x[SVML-172] - _ = x[SVMNP-173] - _ = x[SVMPF-174] - _ = x[SVMPFT-175] - _ = x[SYSCALL-176] - _ = x[SYSEE-177] - _ = x[TBM-178] - _ = x[TDX_GUEST-179] - _ = x[TLB_FLUSH_NESTED-180] - _ = x[TME-181] - _ = x[TOPEXT-182] - _ = x[TSA_L1_NO-183] - _ = x[TSA_SQ_NO-184] - _ = x[TSA_VERW_CLEAR-185] - _ = x[TSCRATEMSR-186] - _ = x[TSXLDTRK-187] - _ = x[VAES-188] - _ = x[VMCBCLEAN-189] - _ = x[VMPL-190] - _ = x[VMSA_REGPROT-191] - _ = x[VMX-192] - _ = x[VPCLMULQDQ-193] - _ = x[VTE-194] - _ = x[WAITPKG-195] - _ = x[WBNOINVD-196] - _ = x[WRMSRNS-197] - _ = x[X87-198] - _ = x[XGETBV1-199] - _ = x[XOP-200] - _ = x[XSAVE-201] - _ = x[XSAVEC-202] - _ = x[XSAVEOPT-203] - _ = x[XSAVES-204] - _ = x[AESARM-205] - _ = x[ARMCPUID-206] - _ = x[ASIMD-207] - _ = x[ASIMDDP-208] - _ = x[ASIMDHP-209] - _ = x[ASIMDRDM-210] - _ = x[ATOMICS-211] - _ = x[CRC32-212] - _ = x[DCPOP-213] - _ = x[EVTSTRM-214] - _ = x[FCMA-215] - _ = x[FHM-216] - _ = x[FP-217] - _ = x[FPHP-218] - _ = x[GPA-219] - _ = x[JSCVT-220] - _ = x[LRCPC-221] - _ = x[PMULL-222] - _ = x[RNDR-223] - _ = x[TLB-224] - _ = x[TS-225] - _ = x[SHA1-226] - _ = x[SHA2-227] - _ = x[SHA3-228] - _ = x[SHA512-229] - _ = x[SM3-230] - _ = x[SM4-231] - _ = x[SVE-232] - _ = x[PMU_FIXEDCOUNTER_CYCLES-233] - _ = x[PMU_FIXEDCOUNTER_REFCYCLES-234] - _ = x[PMU_FIXEDCOUNTER_INSTRUCTIONS-235] - _ = x[PMU_FIXEDCOUNTER_TOPDOWN_SLOTS-236] - _ = x[lastID-237] - _ = x[firstID-0] -} - -const _FeatureID_name = "firstIDADXAESNIAMD3DNOWAMD3DNOWEXTAMXBF16AMXFP16AMXINT8AMXFP8AMXTILEAMXTF32AMXCOMPLEXAMXTRANSPOSEAPX_FAVXAVX10AVX10_128AVX10_256AVX10_512AVX2AVX512BF16AVX512BITALGAVX512BWAVX512CDAVX512DQAVX512ERAVX512FAVX512FP16AVX512IFMAAVX512PFAVX512VBMIAVX512VBMI2AVX512VLAVX512VNNIAVX512VP2INTERSECTAVX512VPOPCNTDQAVXIFMAAVXNECONVERTAVXSLOWAVXVNNIAVXVNNIINT8AVXVNNIINT16BHI_CTRLBMI1BMI2CETIBTCETSSCLDEMOTECLMULCLZEROCMOVCMPCCXADDCMPSB_SCADBS_SHORTCMPXCHG8CPBOOSTCPPCCX16EFER_LMSLE_UNSENQCMDERMSF16CFLUSH_L1DFMA3FMA4FP128FP256FSRMFXSRFXSROPTGFNIHLEHRESETHTTHWAHYBRID_CPUHYPERVISORIA32_ARCH_CAPIA32_CORE_CAPIBPBIBPB_BRTYPEIBRSIBRS_PREFERREDIBRS_PROVIDES_SMPIBSIBSBRNTRGTIBSFETCHSAMIBSFFVIBSOPCNTIBSOPCNTEXTIBSOPSAMIBSRDWROPCNTIBSRIPINVALIDCHKIBS_FETCH_CTLXIBS_OPDATA4IBS_OPFUSEIBS_PREVENTHOSTIBS_ZEN4IDPRED_CTRLINT_WBINVDINVLPGBKEYLOCKERKEYLOCKERWLAHFLAMLBRVIRTLZCNTMCAOVERFLOWMCDT_NOMCOMMITMD_CLEARMMXMMXEXTMOVBEMOVDIR64BMOVDIRIMOVSB_ZLMOVUMPXMSRIRCMSRLISTMSR_PAGEFLUSHNRIPSNXOSXSAVEPCONFIGPOPCNTPPINPREFETCHIPSFDRDPRURDRANDRDSEEDRDTSCPRRSBA_CTRLRTMRTM_ALWAYS_ABORTSBPBSERIALIZESEVSEV_64BITSEV_ALTERNATIVESEV_DEBUGSWAPSEV_ESSEV_RESTRICTEDSEV_SNPSGXSGXLCSGXPQCSHASMESME_COHERENTSM3_X86SM4_X86SPEC_CTRL_SSBDSRBDS_CTRLSRSO_MSR_FIXSRSO_NOSRSO_USER_KERNEL_NOSSESSE2SSE3SSE4SSE42SSE4ASSSE3STIBPSTIBP_ALWAYSONSTOSB_SHORTSUCCORSVMSVMDASVMFBASIDSVMLSVMNPSVMPFSVMPFTSYSCALLSYSEETBMTDX_GUESTTLB_FLUSH_NESTEDTMETOPEXTTSA_L1_NOTSA_SQ_NOTSA_VERW_CLEARTSCRATEMSRTSXLDTRKVAESVMCBCLEANVMPLVMSA_REGPROTVMXVPCLMULQDQVTEWAITPKGWBNOINVDWRMSRNSX87XGETBV1XOPXSAVEXSAVECXSAVEOPTXSAVESAESARMARMCPUIDASIMDASIMDDPASIMDHPASIMDRDMATOMICSCRC32DCPOPEVTSTRMFCMAFHMFPFPHPGPAJSCVTLRCPCPMULLRNDRTLBTSSHA1SHA2SHA3SHA512SM3SM4SVEPMU_FIXEDCOUNTER_CYCLESPMU_FIXEDCOUNTER_REFCYCLESPMU_FIXEDCOUNTER_INSTRUCTIONSPMU_FIXEDCOUNTER_TOPDOWN_SLOTSlastID" - -var _FeatureID_index = [...]uint16{0, 7, 10, 15, 23, 34, 41, 48, 55, 61, 68, 75, 85, 97, 102, 105, 110, 119, 128, 137, 141, 151, 163, 171, 179, 187, 195, 202, 212, 222, 230, 240, 251, 259, 269, 287, 302, 309, 321, 328, 335, 346, 358, 366, 370, 374, 380, 385, 393, 398, 404, 408, 417, 435, 443, 450, 454, 458, 472, 478, 482, 486, 495, 499, 503, 508, 513, 517, 521, 528, 532, 535, 541, 544, 547, 557, 567, 580, 593, 597, 608, 612, 626, 643, 646, 656, 667, 673, 681, 692, 700, 712, 728, 742, 753, 763, 778, 786, 797, 807, 814, 823, 833, 837, 840, 847, 852, 863, 870, 877, 885, 888, 894, 899, 908, 915, 923, 927, 930, 936, 943, 956, 961, 963, 970, 977, 983, 987, 996, 1000, 1005, 1011, 1017, 1023, 1033, 1036, 1052, 1056, 1065, 1068, 1077, 1092, 1105, 1111, 1125, 1132, 1135, 1140, 1146, 1149, 1152, 1164, 1171, 1178, 1192, 1202, 1214, 1221, 1240, 1243, 1247, 1251, 1255, 1260, 1265, 1270, 1275, 1289, 1300, 1306, 1309, 1314, 1323, 1327, 1332, 1337, 1343, 1350, 1355, 1358, 1367, 1383, 1386, 1392, 1401, 1410, 1424, 1434, 1442, 1446, 1455, 1459, 1471, 1474, 1484, 1487, 1494, 1502, 1509, 1512, 1519, 1522, 1527, 1533, 1541, 1547, 1553, 1561, 1566, 1573, 1580, 1588, 1595, 1600, 1605, 1612, 1616, 1619, 1621, 1625, 1628, 1633, 1638, 1643, 1647, 1650, 1652, 1656, 1660, 1664, 1670, 1673, 1676, 1679, 1702, 1728, 1757, 1787, 1793} - -func (i FeatureID) String() string { - if i < 0 || i >= FeatureID(len(_FeatureID_index)-1) { - return "FeatureID(" + strconv.FormatInt(int64(i), 10) + ")" - } - return _FeatureID_name[_FeatureID_index[i]:_FeatureID_index[i+1]] -} -func _() { - // An "invalid array index" compiler error signifies that the constant values have changed. - // Re-run the stringer command to generate them again. - var x [1]struct{} - _ = x[VendorUnknown-0] - _ = x[Intel-1] - _ = x[AMD-2] - _ = x[VIA-3] - _ = x[Transmeta-4] - _ = x[NSC-5] - _ = x[KVM-6] - _ = x[MSVM-7] - _ = x[VMware-8] - _ = x[XenHVM-9] - _ = x[Bhyve-10] - _ = x[Hygon-11] - _ = x[SiS-12] - _ = x[RDC-13] - _ = x[Ampere-14] - _ = x[ARM-15] - _ = x[Broadcom-16] - _ = x[Cavium-17] - _ = x[DEC-18] - _ = x[Fujitsu-19] - _ = x[Infineon-20] - _ = x[Motorola-21] - _ = x[NVIDIA-22] - _ = x[AMCC-23] - _ = x[Qualcomm-24] - _ = x[Marvell-25] - _ = x[QEMU-26] - _ = x[QNX-27] - _ = x[ACRN-28] - _ = x[SRE-29] - _ = x[Apple-30] - _ = x[lastVendor-31] -} - -const _Vendor_name = "VendorUnknownIntelAMDVIATransmetaNSCKVMMSVMVMwareXenHVMBhyveHygonSiSRDCAmpereARMBroadcomCaviumDECFujitsuInfineonMotorolaNVIDIAAMCCQualcommMarvellQEMUQNXACRNSREApplelastVendor" - -var _Vendor_index = [...]uint8{0, 13, 18, 21, 24, 33, 36, 39, 43, 49, 55, 60, 65, 68, 71, 77, 80, 88, 94, 97, 104, 112, 120, 126, 130, 138, 145, 149, 152, 156, 159, 164, 174} - -func (i Vendor) String() string { - if i < 0 || i >= Vendor(len(_Vendor_index)-1) { - return "Vendor(" + strconv.FormatInt(int64(i), 10) + ")" - } - return _Vendor_name[_Vendor_index[i]:_Vendor_index[i+1]] -} diff --git a/vendor/github.com/klauspost/cpuid/v2/os_darwin_arm64.go b/vendor/github.com/klauspost/cpuid/v2/os_darwin_arm64.go deleted file mode 100644 index da07522e..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/os_darwin_arm64.go +++ /dev/null @@ -1,129 +0,0 @@ -// Copyright (c) 2020 Klaus Post, released under MIT License. See LICENSE file. - -package cpuid - -import ( - "runtime" - "strings" - - "golang.org/x/sys/unix" -) - -func detectOS(c *CPUInfo) bool { - if runtime.GOOS != "ios" { - tryToFillCPUInfoFomSysctl(c) - } - // There are no hw.optional sysctl values for the below features on Mac OS 11.0 - // to detect their supported state dynamically. Assume the CPU features that - // Apple Silicon M1 supports to be available as a minimal set of features - // to all Go programs running on darwin/arm64. - // TODO: Add more if we know them. - c.featureSet.setIf(runtime.GOOS != "ios", AESARM, PMULL, SHA1, SHA2) - - return true -} - -func sysctlGetBool(name string) bool { - value, err := unix.SysctlUint32(name) - if err != nil { - return false - } - return value != 0 -} - -func sysctlGetString(name string) string { - value, err := unix.Sysctl(name) - if err != nil { - return "" - } - return value -} - -func sysctlGetInt(unknown int, names ...string) int { - for _, name := range names { - value, err := unix.SysctlUint32(name) - if err != nil { - continue - } - if value != 0 { - return int(value) - } - } - return unknown -} - -func sysctlGetInt64(unknown int, names ...string) int { - for _, name := range names { - value64, err := unix.SysctlUint64(name) - if err != nil { - continue - } - if int(value64) != unknown { - return int(value64) - } - } - return unknown -} - -func setFeature(c *CPUInfo, feature FeatureID, aliases ...string) { - for _, alias := range aliases { - set := sysctlGetBool(alias) - c.featureSet.setIf(set, feature) - if set { - break - } - } -} - -func tryToFillCPUInfoFomSysctl(c *CPUInfo) { - c.BrandName = sysctlGetString("machdep.cpu.brand_string") - - if len(c.BrandName) != 0 { - c.VendorString = strings.Fields(c.BrandName)[0] - } - - c.PhysicalCores = sysctlGetInt(runtime.NumCPU(), "hw.physicalcpu") - c.ThreadsPerCore = sysctlGetInt(1, "machdep.cpu.thread_count", "kern.num_threads") / - sysctlGetInt(1, "hw.physicalcpu") - c.LogicalCores = sysctlGetInt(runtime.NumCPU(), "machdep.cpu.core_count") - c.Family = sysctlGetInt(0, "machdep.cpu.family", "hw.cpufamily") - c.Model = sysctlGetInt(0, "machdep.cpu.model") - c.CacheLine = sysctlGetInt64(0, "hw.cachelinesize") - c.Cache.L1I = sysctlGetInt64(-1, "hw.l1icachesize") - c.Cache.L1D = sysctlGetInt64(-1, "hw.l1dcachesize") - c.Cache.L2 = sysctlGetInt64(-1, "hw.l2cachesize") - c.Cache.L3 = sysctlGetInt64(-1, "hw.l3cachesize") - - // ARM features: - // - // Note: On some Apple Silicon system, some feats have aliases. See: - // https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/determining_instruction_set_characteristics - // When so, we look at all aliases and consider a feature available when at least one identifier matches. - setFeature(c, AESARM, "hw.optional.arm.FEAT_AES") // AES instructions - setFeature(c, ASIMD, "hw.optional.arm.AdvSIMD", "hw.optional.neon") // Advanced SIMD - setFeature(c, ASIMDDP, "hw.optional.arm.FEAT_DotProd") // SIMD Dot Product - setFeature(c, ASIMDHP, "hw.optional.arm.AdvSIMD_HPFPCvt", "hw.optional.neon_hpfp") // Advanced SIMD half-precision floating point - setFeature(c, ASIMDRDM, "hw.optional.arm.FEAT_RDM") // Rounding Double Multiply Accumulate/Subtract - setFeature(c, ATOMICS, "hw.optional.arm.FEAT_LSE", "hw.optional.armv8_1_atomics") // Large System Extensions (LSE) - setFeature(c, CRC32, "hw.optional.arm.FEAT_CRC32", "hw.optional.armv8_crc32") // CRC32/CRC32C instructions - setFeature(c, DCPOP, "hw.optional.arm.FEAT_DPB") // Data cache clean to Point of Persistence (DC CVAP) - setFeature(c, EVTSTRM, "hw.optional.arm.FEAT_ECV") // Generic timer - setFeature(c, FCMA, "hw.optional.arm.FEAT_FCMA", "hw.optional.armv8_3_compnum") // Floating point complex number addition and multiplication - setFeature(c, FHM, "hw.optional.armv8_2_fhm", "hw.optional.arm.FEAT_FHM") // FMLAL and FMLSL instructions - setFeature(c, FP, "hw.optional.floatingpoint") // Single-precision and double-precision floating point - setFeature(c, FPHP, "hw.optional.arm.FEAT_FP16", "hw.optional.neon_fp16") // Half-precision floating point - setFeature(c, GPA, "hw.optional.arm.FEAT_PAuth") // Generic Pointer Authentication - setFeature(c, JSCVT, "hw.optional.arm.FEAT_JSCVT") // Javascript-style double->int convert (FJCVTZS) - setFeature(c, LRCPC, "hw.optional.arm.FEAT_LRCPC") // Weaker release consistency (LDAPR, etc) - setFeature(c, PMULL, "hw.optional.arm.FEAT_PMULL") // Polynomial Multiply instructions (PMULL/PMULL2) - setFeature(c, RNDR, "hw.optional.arm.FEAT_RNG") // Random Number instructions - setFeature(c, TLB, "hw.optional.arm.FEAT_TLBIOS", "hw.optional.arm.FEAT_TLBIRANGE") // Outer Shareable and TLB range maintenance instructions - setFeature(c, TS, "hw.optional.arm.FEAT_FlagM", "hw.optional.arm.FEAT_FlagM2") // Flag manipulation instructions - setFeature(c, SHA1, "hw.optional.arm.FEAT_SHA1") // SHA-1 instructions (SHA1C, etc) - setFeature(c, SHA2, "hw.optional.arm.FEAT_SHA256") // SHA-2 instructions (SHA256H, etc) - setFeature(c, SHA3, "hw.optional.arm.FEAT_SHA3") // SHA-3 instructions (EOR3, RAXI, XAR, BCAX) - setFeature(c, SHA512, "hw.optional.arm.FEAT_SHA512") // SHA512 instructions - setFeature(c, SM3, "hw.optional.arm.FEAT_SM3") // SM3 instructions - setFeature(c, SM4, "hw.optional.arm.FEAT_SM4") // SM4 instructions - setFeature(c, SVE, "hw.optional.arm.FEAT_SVE") // Scalable Vector Extension -} diff --git a/vendor/github.com/klauspost/cpuid/v2/os_linux_arm64.go b/vendor/github.com/klauspost/cpuid/v2/os_linux_arm64.go deleted file mode 100644 index d96d2443..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/os_linux_arm64.go +++ /dev/null @@ -1,208 +0,0 @@ -// Copyright (c) 2020 Klaus Post, released under MIT License. See LICENSE file. - -// Copyright 2018 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file located -// here https://github.com/golang/sys/blob/master/LICENSE - -package cpuid - -import ( - "encoding/binary" - "io/ioutil" - "runtime" -) - -// HWCAP bits. -const ( - hwcap_FP = 1 << 0 - hwcap_ASIMD = 1 << 1 - hwcap_EVTSTRM = 1 << 2 - hwcap_AES = 1 << 3 - hwcap_PMULL = 1 << 4 - hwcap_SHA1 = 1 << 5 - hwcap_SHA2 = 1 << 6 - hwcap_CRC32 = 1 << 7 - hwcap_ATOMICS = 1 << 8 - hwcap_FPHP = 1 << 9 - hwcap_ASIMDHP = 1 << 10 - hwcap_CPUID = 1 << 11 - hwcap_ASIMDRDM = 1 << 12 - hwcap_JSCVT = 1 << 13 - hwcap_FCMA = 1 << 14 - hwcap_LRCPC = 1 << 15 - hwcap_DCPOP = 1 << 16 - hwcap_SHA3 = 1 << 17 - hwcap_SM3 = 1 << 18 - hwcap_SM4 = 1 << 19 - hwcap_ASIMDDP = 1 << 20 - hwcap_SHA512 = 1 << 21 - hwcap_SVE = 1 << 22 - hwcap_ASIMDFHM = 1 << 23 - hwcap_DIT = 1 << 24 - hwcap_USCAT = 1 << 25 - hwcap_ILRCPC = 1 << 26 - hwcap_FLAGM = 1 << 27 - hwcap_SSBS = 1 << 28 - hwcap_SB = 1 << 29 - hwcap_PACA = 1 << 30 - hwcap_PACG = 1 << 31 - hwcap_GCS = 1 << 32 - - hwcap2_DCPODP = 1 << 0 - hwcap2_SVE2 = 1 << 1 - hwcap2_SVEAES = 1 << 2 - hwcap2_SVEPMULL = 1 << 3 - hwcap2_SVEBITPERM = 1 << 4 - hwcap2_SVESHA3 = 1 << 5 - hwcap2_SVESM4 = 1 << 6 - hwcap2_FLAGM2 = 1 << 7 - hwcap2_FRINT = 1 << 8 - hwcap2_SVEI8MM = 1 << 9 - hwcap2_SVEF32MM = 1 << 10 - hwcap2_SVEF64MM = 1 << 11 - hwcap2_SVEBF16 = 1 << 12 - hwcap2_I8MM = 1 << 13 - hwcap2_BF16 = 1 << 14 - hwcap2_DGH = 1 << 15 - hwcap2_RNG = 1 << 16 - hwcap2_BTI = 1 << 17 - hwcap2_MTE = 1 << 18 - hwcap2_ECV = 1 << 19 - hwcap2_AFP = 1 << 20 - hwcap2_RPRES = 1 << 21 - hwcap2_MTE3 = 1 << 22 - hwcap2_SME = 1 << 23 - hwcap2_SME_I16I64 = 1 << 24 - hwcap2_SME_F64F64 = 1 << 25 - hwcap2_SME_I8I32 = 1 << 26 - hwcap2_SME_F16F32 = 1 << 27 - hwcap2_SME_B16F32 = 1 << 28 - hwcap2_SME_F32F32 = 1 << 29 - hwcap2_SME_FA64 = 1 << 30 - hwcap2_WFXT = 1 << 31 - hwcap2_EBF16 = 1 << 32 - hwcap2_SVE_EBF16 = 1 << 33 - hwcap2_CSSC = 1 << 34 - hwcap2_RPRFM = 1 << 35 - hwcap2_SVE2P1 = 1 << 36 - hwcap2_SME2 = 1 << 37 - hwcap2_SME2P1 = 1 << 38 - hwcap2_SME_I16I32 = 1 << 39 - hwcap2_SME_BI32I32 = 1 << 40 - hwcap2_SME_B16B16 = 1 << 41 - hwcap2_SME_F16F16 = 1 << 42 - hwcap2_MOPS = 1 << 43 - hwcap2_HBC = 1 << 44 - hwcap2_SVE_B16B16 = 1 << 45 - hwcap2_LRCPC3 = 1 << 46 - hwcap2_LSE128 = 1 << 47 - hwcap2_FPMR = 1 << 48 - hwcap2_LUT = 1 << 49 - hwcap2_FAMINMAX = 1 << 50 - hwcap2_F8CVT = 1 << 51 - hwcap2_F8FMA = 1 << 52 - hwcap2_F8DP4 = 1 << 53 - hwcap2_F8DP2 = 1 << 54 - hwcap2_F8E4M3 = 1 << 55 - hwcap2_F8E5M2 = 1 << 56 - hwcap2_SME_LUTV2 = 1 << 57 - hwcap2_SME_F8F16 = 1 << 58 - hwcap2_SME_F8F32 = 1 << 59 - hwcap2_SME_SF8FMA = 1 << 60 - hwcap2_SME_SF8DP4 = 1 << 61 - hwcap2_SME_SF8DP2 = 1 << 62 - hwcap2_POE = 1 << 63 -) - -func detectOS(c *CPUInfo) bool { - // For now assuming no hyperthreading is reasonable. - c.LogicalCores = runtime.NumCPU() - c.PhysicalCores = c.LogicalCores - c.ThreadsPerCore = 1 - if hwcap == 0 { - // We did not get values from the runtime. - // Try reading /proc/self/auxv - - // From https://github.com/golang/sys - const ( - _AT_HWCAP = 16 - _AT_HWCAP2 = 26 - - uintSize = int(32 << (^uint(0) >> 63)) - ) - - buf, err := ioutil.ReadFile("/proc/self/auxv") - if err != nil { - // e.g. on android /proc/self/auxv is not accessible, so silently - // ignore the error and leave Initialized = false. On some - // architectures (e.g. arm64) doinit() implements a fallback - // readout and will set Initialized = true again. - return false - } - bo := binary.LittleEndian - for len(buf) >= 2*(uintSize/8) { - var tag, val uint - switch uintSize { - case 32: - tag = uint(bo.Uint32(buf[0:])) - val = uint(bo.Uint32(buf[4:])) - buf = buf[8:] - case 64: - tag = uint(bo.Uint64(buf[0:])) - val = uint(bo.Uint64(buf[8:])) - buf = buf[16:] - } - switch tag { - case _AT_HWCAP: - hwcap = val - case _AT_HWCAP2: - // Not used - } - } - if hwcap == 0 { - return false - } - } - - // HWCap was populated by the runtime from the auxiliary vector. - // Use HWCap information since reading aarch64 system registers - // is not supported in user space on older linux kernels. - c.featureSet.setIf(isSet(hwcap, hwcap_AES), AESARM) - c.featureSet.setIf(isSet(hwcap, hwcap_ASIMD), ASIMD) - c.featureSet.setIf(isSet(hwcap, hwcap_ASIMDDP), ASIMDDP) - c.featureSet.setIf(isSet(hwcap, hwcap_ASIMDHP), ASIMDHP) - c.featureSet.setIf(isSet(hwcap, hwcap_ASIMDRDM), ASIMDRDM) - c.featureSet.setIf(isSet(hwcap, hwcap_CPUID), ARMCPUID) - c.featureSet.setIf(isSet(hwcap, hwcap_CRC32), CRC32) - c.featureSet.setIf(isSet(hwcap, hwcap_DCPOP), DCPOP) - c.featureSet.setIf(isSet(hwcap, hwcap_EVTSTRM), EVTSTRM) - c.featureSet.setIf(isSet(hwcap, hwcap_FCMA), FCMA) - c.featureSet.setIf(isSet(hwcap, hwcap_ASIMDFHM), FHM) - c.featureSet.setIf(isSet(hwcap, hwcap_FP), FP) - c.featureSet.setIf(isSet(hwcap, hwcap_FPHP), FPHP) - c.featureSet.setIf(isSet(hwcap, hwcap_JSCVT), JSCVT) - c.featureSet.setIf(isSet(hwcap, hwcap_LRCPC), LRCPC) - c.featureSet.setIf(isSet(hwcap, hwcap_PMULL), PMULL) - c.featureSet.setIf(isSet(hwcap, hwcap2_RNG), RNDR) - // c.featureSet.setIf(isSet(hwcap, hwcap_), TLB) - // c.featureSet.setIf(isSet(hwcap, hwcap_), TS) - c.featureSet.setIf(isSet(hwcap, hwcap_SHA1), SHA1) - c.featureSet.setIf(isSet(hwcap, hwcap_SHA2), SHA2) - c.featureSet.setIf(isSet(hwcap, hwcap_SHA3), SHA3) - c.featureSet.setIf(isSet(hwcap, hwcap_SHA512), SHA512) - c.featureSet.setIf(isSet(hwcap, hwcap_SM3), SM3) - c.featureSet.setIf(isSet(hwcap, hwcap_SM4), SM4) - c.featureSet.setIf(isSet(hwcap, hwcap_SVE), SVE) - - // The Samsung S9+ kernel reports support for atomics, but not all cores - // actually support them, resulting in SIGILL. See issue #28431. - // TODO(elias.naur): Only disable the optimization on bad chipsets on android. - c.featureSet.setIf(isSet(hwcap, hwcap_ATOMICS) && runtime.GOOS != "android", ATOMICS) - - return true -} - -func isSet(hwc uint, value uint) bool { - return hwc&value != 0 -} diff --git a/vendor/github.com/klauspost/cpuid/v2/os_other_arm64.go b/vendor/github.com/klauspost/cpuid/v2/os_other_arm64.go deleted file mode 100644 index 8733ba34..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/os_other_arm64.go +++ /dev/null @@ -1,16 +0,0 @@ -// Copyright (c) 2020 Klaus Post, released under MIT License. See LICENSE file. - -//go:build arm64 && !linux && !darwin -// +build arm64,!linux,!darwin - -package cpuid - -import "runtime" - -func detectOS(c *CPUInfo) bool { - c.PhysicalCores = runtime.NumCPU() - // For now assuming 1 thread per core... - c.ThreadsPerCore = 1 - c.LogicalCores = c.PhysicalCores - return false -} diff --git a/vendor/github.com/klauspost/cpuid/v2/os_safe_linux_arm64.go b/vendor/github.com/klauspost/cpuid/v2/os_safe_linux_arm64.go deleted file mode 100644 index f8f201b5..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/os_safe_linux_arm64.go +++ /dev/null @@ -1,8 +0,0 @@ -// Copyright (c) 2021 Klaus Post, released under MIT License. See LICENSE file. - -//go:build nounsafe -// +build nounsafe - -package cpuid - -var hwcap uint diff --git a/vendor/github.com/klauspost/cpuid/v2/os_unsafe_linux_arm64.go b/vendor/github.com/klauspost/cpuid/v2/os_unsafe_linux_arm64.go deleted file mode 100644 index 92af622e..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/os_unsafe_linux_arm64.go +++ /dev/null @@ -1,11 +0,0 @@ -// Copyright (c) 2021 Klaus Post, released under MIT License. See LICENSE file. - -//go:build !nounsafe -// +build !nounsafe - -package cpuid - -import _ "unsafe" // needed for go:linkname - -//go:linkname hwcap internal/cpu.HWCap -var hwcap uint diff --git a/vendor/github.com/klauspost/cpuid/v2/test-architectures.sh b/vendor/github.com/klauspost/cpuid/v2/test-architectures.sh deleted file mode 100644 index 471d986d..00000000 --- a/vendor/github.com/klauspost/cpuid/v2/test-architectures.sh +++ /dev/null @@ -1,15 +0,0 @@ -#!/bin/sh - -set -e - -go tool dist list | while IFS=/ read os arch; do - echo "Checking $os/$arch..." - echo " normal" - GOARCH=$arch GOOS=$os go build -o /dev/null . - echo " noasm" - GOARCH=$arch GOOS=$os go build -tags noasm -o /dev/null . - echo " appengine" - GOARCH=$arch GOOS=$os go build -tags appengine -o /dev/null . - echo " noasm,appengine" - GOARCH=$arch GOOS=$os go build -tags 'appengine noasm' -o /dev/null . -done diff --git a/vendor/github.com/spf13/pflag/.golangci.yaml b/vendor/github.com/spf13/pflag/.golangci.yaml index b274f248..0236240b 100644 --- a/vendor/github.com/spf13/pflag/.golangci.yaml +++ b/vendor/github.com/spf13/pflag/.golangci.yaml @@ -1,4 +1,26 @@ +version: "2" + linters: - disable-all: true enable: + - errorlint - nolintlint + - revive + - unconvert + - unparam + settings: + govet: + disable: + # Suggests reflect.Pointer over reflect.Ptr, which needs Go 1.18. + # This module still builds and tests on Go 1.12 (see go.mod). + - inline + staticcheck: + # Enable all options, with some exceptions. + # For defaults, see https://golangci-lint.run/usage/linters/#staticcheck + checks: + - all + - -QF1008 # Omit embedded fields from selector expression; https://staticcheck.dev/docs/checks/#QF1008 + - -ST1003 # Poorly chosen identifier; https://staticcheck.dev/docs/checks/#ST1003 + +formatters: + enable: + - gofmt diff --git a/vendor/github.com/spf13/pflag/README.md b/vendor/github.com/spf13/pflag/README.md index 388c4e5e..cb4cca6c 100644 --- a/vendor/github.com/spf13/pflag/README.md +++ b/vendor/github.com/spf13/pflag/README.md @@ -1,6 +1,7 @@ -[![Build Status](https://travis-ci.org/spf13/pflag.svg?branch=master)](https://travis-ci.org/spf13/pflag) +[![Build Status](https://github.com/spf13/pflag/actions/workflows/ci.yaml/badge.svg)](https://github.com/spf13/pflag/actions/workflows/ci.yaml) +![GitHub License](https://img.shields.io/github/license/spf13/pflag) [![Go Report Card](https://goreportcard.com/badge/github.com/spf13/pflag)](https://goreportcard.com/report/github.com/spf13/pflag) -[![GoDoc](https://godoc.org/github.com/spf13/pflag?status.svg)](https://godoc.org/github.com/spf13/pflag) +[![PkgGoDev](https://pkg.go.dev/badge/github.com/spf13/pflag)](https://pkg.go.dev/github.com/spf13/pflag) ## Description @@ -11,7 +12,7 @@ pflag is compatible with the [GNU extensions to the POSIX recommendations for command-line options][1]. For a more precise description, see the "Command-line flag syntax" section below. -[1]: http://www.gnu.org/software/libc/manual/html_node/Argument-Syntax.html +[1]: https://sourceware.org/glibc/manual/latest/html_node/Argument-Syntax.html pflag is available under the same style of BSD license as the Go language, which can be found in the LICENSE file. @@ -22,7 +23,7 @@ pflag is available using the standard `go get` command. Install by running: - go get github.com/spf13/pflag + go get github.com/spf13/pflag@latest Run tests by running: @@ -179,6 +180,25 @@ Flag parsing stops after the terminator "--". Unlike the flag package, flags can be interspersed with arguments anywhere on the command line before this terminator. +To stop parsing at the first non-flag argument, call +`flag.SetInterspersed(false)` before `flag.Parse()`, or use +`flags.SetInterspersed(false)` on a `FlagSet`. This is useful for wrappers +that pass a command and its remaining arguments through unchanged: + +```go +flags := flag.NewFlagSet("wrapper", flag.ContinueOnError) +verbose := flags.Bool("verbose", false, "verbose output") +flags.SetInterspersed(false) +if err := flags.Parse([]string{"--verbose", "echo", "--verbose", "hello"}); err != nil { + panic(err) +} +fmt.Println(*verbose) // true +fmt.Println(flags.Args()) // [echo --verbose hello] +``` + +The second `--verbose` belongs to `echo`, so it is left in `flags.Args()` +along with every argument after the command, even if it names a known flag. + Integer flags accept 1234, 0664, 0x1234 and may be negative. Boolean flags (in their long form) accept 1, 0, t, f, true, false, TRUE, FALSE, True, False. @@ -249,13 +269,35 @@ flags.MarkHidden("secretFlag") ## Disable sorting of flags `pflag` allows you to disable sorting of flags for help and usage message. +`SortFlags` is a field on `FlagSet`, not a package-level variable. To disable +sorting on the default `CommandLine` flag set, use `pflag.CommandLine.SortFlags`. + **Example**: ```go -flags.BoolP("verbose", "v", false, "verbose output") -flags.String("coolflag", "yeaah", "it's really cool flag") -flags.Int("usefulflag", 777, "sometimes it's very useful") -flags.SortFlags = false -flags.PrintDefaults() +package main + +import ( + "fmt" + + "github.com/spf13/pflag" +) + +func main() { + flags := pflag.NewFlagSet("example", pflag.ContinueOnError) + flags.BoolP("verbose", "v", false, "verbose output") + flags.String("coolflag", "yeaah", "it's really cool flag") + flags.Int("usefulflag", 777, "sometimes it's very useful") + flags.SortFlags = false + flags.PrintDefaults() + fmt.Println() +} +``` + +For the default `CommandLine` flag set: + +```go +pflag.CommandLine.SortFlags = false +pflag.PrintDefaults() ``` **Output**: ``` @@ -271,12 +313,15 @@ to support flags defined by third-party dependencies (e.g. `golang/glog`). **Example**: You want to add the Go flags to the `CommandLine` flagset ```go +package main + import ( goflag "flag" + flag "github.com/spf13/pflag" ) -var ip *int = flag.Int("flagname", 1234, "help message for flagname") +var ip = flag.Int("flagname", 1234, "help message for flagname") func main() { flag.CommandLine.AddGoFlagSet(goflag.CommandLine) @@ -296,17 +341,22 @@ will result in the `-v` flag being ignored. This happens because of the way pfla To work around this, you can use the `ParseSkippedFlags` function, which ensures that go test's flags are parsed separately using the standard flag package. **Example**: You want to parse go test flags that are otherwise ignore by `pflag.Parse()` + ```go +package main + import ( goflag "flag" + "os" + flag "github.com/spf13/pflag" ) -var ip *int = flag.Int("flagname", 1234, "help message for flagname") +var ip = flag.Int("flagname", 1234, "help message for flagname") func main() { flag.CommandLine.AddGoFlagSet(goflag.CommandLine) - flag.ParseSkippedFlags(os.Args[1:], goflag.CommandLine) + flag.ParseSkippedFlags(os.Args[1:], goflag.CommandLine) flag.Parse() } ``` @@ -314,10 +364,7 @@ func main() { ## More info You can see the full reference documentation of the pflag package -[at godoc.org][3], or through go's standard documentation system by -running `godoc -http=:6060` and browsing to -[http://localhost:6060/pkg/github.com/spf13/pflag][2] after -installation. +at [pkg.go.dev][2], or through go's standard documentation system by +cloning the repository and running `go doc -http` in it. -[2]: http://localhost:6060/pkg/github.com/spf13/pflag -[3]: http://godoc.org/github.com/spf13/pflag +[2]: https://pkg.go.dev/github.com/spf13/pflag diff --git a/vendor/github.com/spf13/pflag/RELEASING.md b/vendor/github.com/spf13/pflag/RELEASING.md new file mode 100644 index 00000000..d90334d0 --- /dev/null +++ b/vendor/github.com/spf13/pflag/RELEASING.md @@ -0,0 +1,31 @@ +# Releasing pflag + +This document describes how to create a new pflag release. + +## Method 1: GitHub UI (recommended by maintainers) + +1. Go to the [releases page](https://github.com/spf13/pflag/releases) +2. Click **"Draft a new release"** +3. Click **"Generate release notes"** — this shows the merged PRs since the last tag, which helps determine the next version (minor vs patch) +4. Choose the tag version (e.g., `v1.0.8`) — the tag will be created when the release is published +5. Review the generated notes, then publish + +This method has the advantage that the tag and release are published atomically, and the PR list helps pick the right version number before tagging. + +## Method 2: GitHub CLI + +```bash +git checkout master +git pull origin master + +# Tag and push +git tag v1.0.8 +git push origin v1.0.8 + +# Create release with auto-generated notes +gh release create v1.0.8 --generate-notes +``` + +## Notes + +pflag follows [Semantic Versioning](https://semver.org/). Check the [releases page](https://github.com/spf13/pflag/releases) for the latest tag. diff --git a/vendor/github.com/spf13/pflag/bool.go b/vendor/github.com/spf13/pflag/bool.go index c4c5c0bf..7286df8e 100644 --- a/vendor/github.com/spf13/pflag/bool.go +++ b/vendor/github.com/spf13/pflag/bool.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // optional interface to indicate boolean flags that can be // supplied without "=value" text @@ -9,6 +12,13 @@ type boolFlag interface { IsBoolFlag() bool } +func isNoOptBoolValue(v Value) bool { + if bf, ok := v.(boolFlag); ok { + return bf.IsBoolFlag() + } + return false +} + // -- bool Value type boolValue bool @@ -19,8 +29,11 @@ func newBoolValue(val bool, p *bool) *boolValue { func (b *boolValue) Set(s string) error { v, err := strconv.ParseBool(s) + if err != nil { + return errors.New("must be true or false") + } *b = boolValue(v) - return err + return nil } func (b *boolValue) Type() string { diff --git a/vendor/github.com/spf13/pflag/bool_slice.go b/vendor/github.com/spf13/pflag/bool_slice.go index 3731370d..58a788d2 100644 --- a/vendor/github.com/spf13/pflag/bool_slice.go +++ b/vendor/github.com/spf13/pflag/bool_slice.go @@ -22,13 +22,12 @@ func newBoolSliceValue(val []bool, p *[]bool) *boolSliceValue { // Set converts, and assigns, the comma-separated boolean argument string representation as the []bool value of this flag. // If Set is called on a flag that already has a []bool assigned, the newly converted values will be appended. func (s *boolSliceValue) Set(val string) error { - // remove all quote characters rmQuote := strings.NewReplacer(`"`, "", `'`, "", "`", "") // read flag arguments with CSV parser boolStrSlice, err := readAsCSV(rmQuote.Replace(val)) - if err != nil && err != io.EOF { + if err != nil && err != io.EOF { //nolint:errorlint // not using errors.Is for compatibility with go1.12 return err } @@ -60,7 +59,6 @@ func (s *boolSliceValue) Type() string { // String defines a "native" format for this boolean slice flag value. func (s *boolSliceValue) String() string { - boolStrSlice := make([]string, len(*s.value)) for i, b := range *s.value { boolStrSlice[i] = strconv.FormatBool(b) diff --git a/vendor/github.com/spf13/pflag/bytes.go b/vendor/github.com/spf13/pflag/bytes.go index 67d53045..1c100848 100644 --- a/vendor/github.com/spf13/pflag/bytes.go +++ b/vendor/github.com/spf13/pflag/bytes.go @@ -18,7 +18,6 @@ func (bytesHex bytesHexValue) String() string { // Set implements pflag.Value.Set. func (bytesHex *bytesHexValue) Set(value string) error { bin, err := hex.DecodeString(strings.TrimSpace(value)) - if err != nil { return err } @@ -39,20 +38,18 @@ func newBytesHexValue(val []byte, p *[]byte) *bytesHexValue { } func bytesHexConv(sval string) (interface{}, error) { - bin, err := hex.DecodeString(sval) if err == nil { return bin, nil } - return nil, fmt.Errorf("invalid string being converted to Bytes: %s %s", sval, err) + return nil, fmt.Errorf("invalid string being converted to Bytes: %s %s", sval, err.Error()) } // GetBytesHex return the []byte value of a flag with the given name func (f *FlagSet) GetBytesHex(name string) ([]byte, error) { val, err := f.getFlagType(name, "bytesHex", bytesHexConv) - if err != nil { return []byte{}, err } @@ -119,7 +116,6 @@ func (bytesBase64 bytesBase64Value) String() string { // Set implements pflag.Value.Set. func (bytesBase64 *bytesBase64Value) Set(value string) error { bin, err := base64.StdEncoding.DecodeString(strings.TrimSpace(value)) - if err != nil { return err } @@ -140,19 +136,17 @@ func newBytesBase64Value(val []byte, p *[]byte) *bytesBase64Value { } func bytesBase64ValueConv(sval string) (interface{}, error) { - bin, err := base64.StdEncoding.DecodeString(sval) if err == nil { return bin, nil } - return nil, fmt.Errorf("invalid string being converted to Bytes: %s %s", sval, err) + return nil, fmt.Errorf("invalid string being converted to Bytes: %s %s", sval, err.Error()) } // GetBytesBase64 return the []byte value of a flag with the given name func (f *FlagSet) GetBytesBase64(name string) ([]byte, error) { val, err := f.getFlagType(name, "bytesBase64", bytesBase64ValueConv) - if err != nil { return []byte{}, err } diff --git a/vendor/github.com/spf13/pflag/count.go b/vendor/github.com/spf13/pflag/count.go index d49c0143..d09afc39 100644 --- a/vendor/github.com/spf13/pflag/count.go +++ b/vendor/github.com/spf13/pflag/count.go @@ -13,12 +13,15 @@ func newCountValue(val int, p *int) *countValue { func (i *countValue) Set(s string) error { // "+1" means that no specific value was passed, so increment if s == "+1" { - *i = countValue(*i + 1) + *i = *i + 1 return nil } v, err := strconv.ParseInt(s, 0, 0) + if err != nil { + return err + } *i = countValue(v) - return err + return nil } func (i *countValue) Type() string { diff --git a/vendor/github.com/spf13/pflag/duration.go b/vendor/github.com/spf13/pflag/duration.go index e9debef8..f5d78b74 100644 --- a/vendor/github.com/spf13/pflag/duration.go +++ b/vendor/github.com/spf13/pflag/duration.go @@ -1,6 +1,7 @@ package pflag import ( + "errors" "time" ) @@ -14,8 +15,11 @@ func newDurationValue(val time.Duration, p *time.Duration) *durationValue { func (d *durationValue) Set(s string) error { v, err := time.ParseDuration(s) + if err != nil { + return errors.New(`must be a duration like "30s" or "5m"`) + } *d = durationValue(v) - return err + return nil } func (d *durationValue) Type() string { diff --git a/vendor/github.com/spf13/pflag/duration_slice.go b/vendor/github.com/spf13/pflag/duration_slice.go index badadda5..ee987274 100644 --- a/vendor/github.com/spf13/pflag/duration_slice.go +++ b/vendor/github.com/spf13/pflag/duration_slice.go @@ -1,7 +1,6 @@ package pflag import ( - "fmt" "strings" "time" ) @@ -46,7 +45,7 @@ func (s *durationSliceValue) Type() string { func (s *durationSliceValue) String() string { out := make([]string, len(*s.value)) for i, d := range *s.value { - out[i] = fmt.Sprintf("%s", d) + out[i] = d.String() } return "[" + strings.Join(out, ",") + "]" } @@ -56,7 +55,7 @@ func (s *durationSliceValue) fromString(val string) (time.Duration, error) { } func (s *durationSliceValue) toString(val time.Duration) string { - return fmt.Sprintf("%s", val) + return val.String() } func (s *durationSliceValue) Append(val string) error { diff --git a/vendor/github.com/spf13/pflag/errors.go b/vendor/github.com/spf13/pflag/errors.go index ff11b66b..63765ddc 100644 --- a/vendor/github.com/spf13/pflag/errors.go +++ b/vendor/github.com/spf13/pflag/errors.go @@ -10,7 +10,6 @@ type notExistErrorMessageType int const ( flagNotExistMessage notExistErrorMessageType = iota - flagNotDefinedMessage flagNoSuchFlagMessage flagUnknownFlagMessage flagUnknownShorthandFlagMessage @@ -30,9 +29,6 @@ func (e *NotExistError) Error() string { case flagNotExistMessage: return fmt.Sprintf("flag %q does not exist", e.name) - case flagNotDefinedMessage: - return fmt.Sprintf("flag accessed but not defined: %s", e.name) - case flagNoSuchFlagMessage: return fmt.Sprintf("no such flag -%v", e.name) @@ -142,7 +138,7 @@ func (e *InvalidSyntaxError) Error() string { return fmt.Sprintf("bad flag syntax: %s", e.specifiedFlag) } -// GetSpecifiedName returns the exact flag (with dashes) as it +// GetSpecifiedFlag returns the exact flag (with dashes) as it // appeared in the parsed arguments. func (e *InvalidSyntaxError) GetSpecifiedFlag() string { return e.specifiedFlag diff --git a/vendor/github.com/spf13/pflag/flag.go b/vendor/github.com/spf13/pflag/flag.go index 2fd3c575..2670bb79 100644 --- a/vendor/github.com/spf13/pflag/flag.go +++ b/vendor/github.com/spf13/pflag/flag.go @@ -137,10 +137,29 @@ const ( PanicOnError ) +// UnknownFlagsHandling decides how to handle unknown flags +type UnknownFlagsHandling int + +const ( + // ErrorOnUnknownFlag will return an error if an unknown flag is found + ErrorOnUnknownFlag UnknownFlagsHandling = iota + // IgnoreUnknownFlag will ignore unknown flags and continue parsing rest of the flags + IgnoreUnknownFlag + // PassUnknownFlagToArgs will treat unknown flags as non-flag arguments. + // Combined shorthand flags mixed with known ones and unknown ones results + // combined flags only with unknown ones. + // E.g. -fghi results -gh if only `f` and `i` are known. + PassUnknownFlagToArgs +) + // ParseErrorsAllowlist defines the parsing errors that can be ignored type ParseErrorsAllowlist struct { // UnknownFlags will ignore unknown flags errors and continue parsing rest of the flags + // Deprecated: Use UnknownFlagsHandling instead UnknownFlags bool + + // UnknownFlagsHandling decides how to handle unknown flags. Defaults to UnknownFlagsHandlingErrorOnUnknown. + UnknownFlagsHandling UnknownFlagsHandling } // ParseErrorsWhitelist defines the parsing errors that can be ignored. @@ -270,7 +289,7 @@ func (f *FlagSet) GetNormalizeFunc() func(f *FlagSet, name string) NormalizedNam if f.normalizeNameFunc != nil { return f.normalizeNameFunc } - return func(f *FlagSet, name string) NormalizedName { return NormalizedName(name) } + return func(_ *FlagSet, name string) NormalizedName { return NormalizedName(name) } } func (f *FlagSet) normalizeFlagName(name string) NormalizedName { @@ -337,6 +356,35 @@ func (f *FlagSet) HasAvailableFlags() bool { return false } +// getUnknownFlagsHandling returns the UnknownFlagsHandling value, +// considering deprecated ParseErrorsWhitelist and UnknownFlags field +// After removing ParseErrorsWhitelist, this function can be simplified +// and moved to ParseErrorsAllowlist.getUnknownFlagsHandling() +func (f *FlagSet) getUnknownFlagsHandling() UnknownFlagsHandling { + // first check ParseErrorsAllowlist: + // if UnknownFlagsHandling is set, use it + if f.ParseErrorsAllowlist.UnknownFlagsHandling != ErrorOnUnknownFlag { + return f.ParseErrorsAllowlist.UnknownFlagsHandling + } + + if f.ParseErrorsAllowlist.UnknownFlags { + return IgnoreUnknownFlag + } + + // then, check deprecated ParseErrorsWhitelist: + // if UnknownFlagsHandling is set, use it + if f.ParseErrorsWhitelist.UnknownFlagsHandling != ErrorOnUnknownFlag { + return f.ParseErrorsWhitelist.UnknownFlagsHandling + } + + if f.ParseErrorsWhitelist.UnknownFlags { + return IgnoreUnknownFlag + } + + // Otherwise, return the default value + return ErrorOnUnknownFlag +} + // VisitAll visits the command-line flags in lexicographical order or // in primordial order if f.SortFlags is false, calling fn for each. // It visits all flags, even those not set. @@ -388,7 +436,7 @@ func (f *FlagSet) ShorthandLookup(name string) *Flag { } if len(name) > 1 { msg := fmt.Sprintf("can not look up shorthand which is more than one ASCII character: %q", name) - fmt.Fprintf(f.Output(), msg) + _, _ = fmt.Fprint(f.Output(), msg) panic(msg) } c := name[0] @@ -400,11 +448,16 @@ func (f *FlagSet) lookup(name NormalizedName) *Flag { return f.formal[name] } -// func to return a given type for a given flag name +// getFlagType performs a lookup of a flag with the given name and ftype. The flag is stringified and passed through +// convFunc before being returned to enforce flag immutablility. +// +// convFunc may be nil, in which case the raw flag value is returned directly and no immutability is enforced. This is +// particularly useful when users need to access the pointer of the underlying flag value for manipulation (e.g. +// resetting flag values in tests). func (f *FlagSet) getFlagType(name string, ftype string, convFunc func(sval string) (interface{}, error)) (interface{}, error) { flag := f.Lookup(name) if flag == nil { - err := &NotExistError{name: name, messageType: flagNotDefinedMessage} + err := &NotExistError{name: name, messageType: flagNotExistMessage} return nil, err } @@ -413,6 +466,10 @@ func (f *FlagSet) getFlagType(name string, ftype string, convFunc func(sval stri return nil, err } + if convFunc == nil { + return flag.Value, nil + } + sval := flag.Value.String() result, err := convFunc(sval) if err != nil { @@ -510,7 +567,7 @@ func (f *FlagSet) Set(name, value string) error { } if flag.Deprecated != "" { - fmt.Fprintf(f.Output(), "Flag --%s has been deprecated, %s\n", flag.Name, flag.Deprecated) + _, _ = fmt.Fprintf(f.Output(), "Flag --%s has been deprecated, %s\n", name, flag.Deprecated) } return nil } @@ -551,15 +608,16 @@ func Set(name, value string) error { // otherwise, the default values of all defined flags in the set. func (f *FlagSet) PrintDefaults() { usages := f.FlagUsages() - fmt.Fprint(f.Output(), usages) + _, _ = fmt.Fprint(f.Output(), usages) } // defaultIsZeroValue returns true if the default value for this flag represents // a zero value. func (f *Flag) defaultIsZeroValue() bool { - switch f.Value.(type) { - case boolFlag: + if isNoOptBoolValue(f.Value) { return f.DefValue == "false" || f.DefValue == "" + } + switch f.Value.(type) { case *durationValue: // Beginning in Go 1.7, duration zero values are "0s" return f.DefValue == "0" || f.DefValue == "0s" @@ -608,6 +666,9 @@ func UnquoteUsage(flag *Flag) (name string, usage string) { } name = flag.Value.Type() + if isNoOptBoolValue(flag.Value) { + name = "" + } switch name { case "bool", "boolfunc": name = "" @@ -635,7 +696,9 @@ func UnquoteUsage(flag *Flag) (name string, usage string) { // Splits the string `s` on whitespace into an initial substring up to // `i` runes in length and the remainder. Will go `slop` over `i` if // that encompasses the entire string (which allows the caller to -// avoid short orphan words on the final line). +// avoid short orphan words on the final line). If the next word is +// wider than `i`, it is returned on its own and wrapping continues +// after it. func wrapN(i, slop int, s string) (string, string) { if i+slop > len(s) { return s, "" @@ -643,7 +706,13 @@ func wrapN(i, slop int, s string) (string, string) { w := strings.LastIndexAny(s[:i], " \t\n") if w <= 0 { - return s, "" + // No break in the first i bytes. Emit the over-wide word + // alone and keep wrapping whatever follows. + next := strings.IndexAny(s, " \t\n") + if next <= 0 { + return s, "" + } + return s[:next], s[next+1:] } nlPos := strings.LastIndex(s[:i], "\n") if nlPos > 0 && nlPos < w { @@ -657,7 +726,7 @@ func wrapN(i, slop int, s string) (string, string) { // caller). Pass `w` == 0 to do no wrapping func wrap(i, w int, s string) string { if w == 0 { - return strings.Replace(s, "\n", "\n"+strings.Repeat(" ", i), -1) + return strings.ReplaceAll(s, "\n", "\n"+strings.Repeat(" ", i)) } // space between indent i and end of line width w into which @@ -675,7 +744,7 @@ func wrap(i, w int, s string) string { } // If still not enough space then don't even try to wrap. if wrap < 24 { - return strings.Replace(s, "\n", r, -1) + return strings.ReplaceAll(s, "\n", r) } // Try to avoid short orphan words on the final line, by @@ -687,18 +756,17 @@ func wrap(i, w int, s string) string { // Handle first line, which is indented by the caller (or the // special case above) l, s = wrapN(wrap, slop, s) - r = r + strings.Replace(l, "\n", "\n"+strings.Repeat(" ", i), -1) + r = r + strings.ReplaceAll(l, "\n", "\n"+strings.Repeat(" ", i)) // Now wrap the rest for s != "" { var t string t, s = wrapN(wrap, slop, s) - r = r + "\n" + strings.Repeat(" ", i) + strings.Replace(t, "\n", "\n"+strings.Repeat(" ", i), -1) + r = r + "\n" + strings.Repeat(" ", i) + strings.ReplaceAll(t, "\n", "\n"+strings.Repeat(" ", i)) } return r - } // FlagUsagesWrapped returns a string containing the usage information @@ -723,9 +791,12 @@ func (f *FlagSet) FlagUsagesWrapped(cols int) string { } varname, usage := UnquoteUsage(flag) - if varname != "" { + if isNoOptBoolValue(flag.Value) && flag.Value.Type() == "bool" { + line += "[=true|false]" + } else if varname != "" { line += " " + varname } + if flag.NoOptDefVal != "" { switch flag.Value.Type() { case "string": @@ -769,7 +840,7 @@ func (f *FlagSet) FlagUsagesWrapped(cols int) string { sidx := strings.Index(line, "\x00") spacing := strings.Repeat(" ", maxlen-sidx) // maxlen + 2 comes from + 1 for the \x00 and + 1 for the (deliberate) off-by-one in maxlen-sidx - fmt.Fprintln(buf, line[:sidx], spacing, wrap(maxlen+2, cols, line[sidx+1:])) + _, _ = fmt.Fprintln(buf, line[:sidx], spacing, wrap(maxlen+2, cols, line[sidx+1:])) } return buf.String() @@ -788,7 +859,7 @@ func PrintDefaults() { // defaultUsage is the default function to print a usage message. func defaultUsage(f *FlagSet) { - fmt.Fprintf(f.Output(), "Usage of %s:\n", f.name) + _, _ = fmt.Fprintf(f.Output(), "Usage of %s:\n", f.name) f.PrintDefaults() } @@ -796,12 +867,13 @@ func defaultUsage(f *FlagSet) { // because it serves (via godoc flag Usage) as the example // for how to write your own usage function. -// Usage prints to standard error a usage message documenting all defined command-line flags. -// The function is a variable that may be changed to point to a custom function. -// By default it prints a simple header and calls PrintDefaults; for details about the -// format of the output and how to control it, see the documentation for PrintDefaults. +// Usage prints, to the set destination, a usage message documenting all defined +// command-line flags. The function is a variable that may be changed to point to a +// custom function. By default it prints a simple header and calls PrintDefaults; for +// details about the format of the output and how to control it, see the documentation +// for PrintDefaults. var Usage = func() { - fmt.Fprintf(os.Stderr, "Usage of %s:\n", os.Args[0]) + _, _ = fmt.Fprintf(CommandLine.Output(), "Usage of %s:\n", os.Args[0]) PrintDefaults() } @@ -874,7 +946,7 @@ func (f *FlagSet) AddFlag(flag *Flag) { _, alreadyThere := f.formal[normalizedFlagName] if alreadyThere { msg := fmt.Sprintf("%s flag redefined: %s", f.name, flag.Name) - fmt.Fprintln(f.Output(), msg) + _, _ = fmt.Fprintln(f.Output(), msg) panic(msg) // Happens only if flags are declared with identical names } if f.formal == nil { @@ -882,6 +954,9 @@ func (f *FlagSet) AddFlag(flag *Flag) { } flag.Name = string(normalizedFlagName) + if flag.NoOptDefVal == "" && isNoOptBoolValue(flag.Value) { + flag.NoOptDefVal = "true" + } f.formal[normalizedFlagName] = flag f.orderedFormal = append(f.orderedFormal, flag) @@ -890,7 +965,7 @@ func (f *FlagSet) AddFlag(flag *Flag) { } if len(flag.Shorthand) > 1 { msg := fmt.Sprintf("%q shorthand is more than one ASCII character", flag.Shorthand) - fmt.Fprintf(f.Output(), msg) + _, _ = fmt.Fprint(f.Output(), msg) panic(msg) } if f.shorthands == nil { @@ -900,7 +975,7 @@ func (f *FlagSet) AddFlag(flag *Flag) { used, alreadyThere := f.shorthands[c] if alreadyThere { msg := fmt.Sprintf("unable to redefine %q shorthand in %q flagset: it's already used for %q flag", c, f.name, used.Name) - fmt.Fprintf(f.Output(), msg) + _, _ = fmt.Fprint(f.Output(), msg) panic(msg) } f.shorthands[c] = flag @@ -960,23 +1035,34 @@ func (f *FlagSet) usage() { // --unknown arg ... (args will be arg ...) func stripUnknownFlagValue(args []string) []string { if len(args) == 0 { - //--unknown + // --unknown return args } first := args[0] if len(first) > 0 && first[0] == '-' { - //--unknown --next-flag ... + // --unknown --next-flag ... return args } - //--unknown arg ... (args will be arg ...) + // --unknown arg ... (args will be arg ...) if len(args) > 1 { return args[1:] } return nil } +// errUnknownFlag is used for internal unknown flag handling. +type unknownFlagError struct { + // UnknownFlags is flags that are unknown and unprocessed. + // It depends on the context whether this has a prefix like '-' or '--'. + UnknownFlags string +} + +func (e *unknownFlagError) Error() string { + return fmt.Sprintf("unknown flag: %v", e.UnknownFlags) +} + func (f *FlagSet) parseLongArg(s string, args []string, fn parseFunc) (a []string, err error) { a = args name := s[2:] @@ -988,15 +1074,14 @@ func (f *FlagSet) parseLongArg(s string, args []string, fn parseFunc) (a []strin split := strings.SplitN(name, "=", 2) name = split[0] flag, exists := f.formal[f.normalizeFlagName(name)] + unknownFlagsHandling := f.getUnknownFlagsHandling() if !exists { switch { case name == "help": f.usage() return a, ErrHelp - case f.ParseErrorsWhitelist.UnknownFlags: - fallthrough - case f.ParseErrorsAllowlist.UnknownFlags: + case unknownFlagsHandling == IgnoreUnknownFlag: // --unknown=unknownval arg ... // we do not want to lose arg in this case if len(split) >= 2 { @@ -1004,6 +1089,10 @@ func (f *FlagSet) parseLongArg(s string, args []string, fn parseFunc) (a []strin } return stripUnknownFlagValue(a), nil + case unknownFlagsHandling == PassUnknownFlagToArgs: + return a, &unknownFlagError{ + UnknownFlags: s, + } default: err = f.fail(&NotExistError{name: name, messageType: flagUnknownFlagMessage}) return @@ -1030,9 +1119,11 @@ func (f *FlagSet) parseLongArg(s string, args []string, fn parseFunc) (a []strin return } - err = fn(flag, value) + // Pass the name the user actually typed so a deprecation message reports + // it rather than the canonical name a NormalizeFunc may have mapped it to. + err = fn(flag, name, value) if err != nil { - f.fail(err) + err = f.fail(err) } return } @@ -1049,14 +1140,14 @@ func (f *FlagSet) parseSingleShortArg(shorthands string, args []string, fn parse flag, exists := f.shorthands[c] if !exists { + unknownFlagsHandling := f.getUnknownFlagsHandling() + switch { case c == 'h': f.usage() err = ErrHelp return - case f.ParseErrorsWhitelist.UnknownFlags: - fallthrough - case f.ParseErrorsAllowlist.UnknownFlags: + case unknownFlagsHandling == IgnoreUnknownFlag: // '-f=arg arg ...' // we do not want to lose arg in this case if len(shorthands) > 2 && shorthands[1] == '=' { @@ -1066,6 +1157,20 @@ func (f *FlagSet) parseSingleShortArg(shorthands string, args []string, fn parse outArgs = stripUnknownFlagValue(outArgs) return + case unknownFlagsHandling == PassUnknownFlagToArgs: + // '-f=arg': pass all the argument + if len(shorthands) > 2 && shorthands[1] == '=' { + outShorts = "" + err = &unknownFlagError{ + UnknownFlags: shorthands, + } + return + } + // '-fgh': pass only the first switch + err = &unknownFlagError{ + UnknownFlags: shorthands[0:1], + } + return default: err = f.fail(&NotExistError{ name: string(c), @@ -1103,12 +1208,12 @@ func (f *FlagSet) parseSingleShortArg(shorthands string, args []string, fn parse } if flag.ShorthandDeprecated != "" { - fmt.Fprintf(f.Output(), "Flag shorthand -%s has been deprecated, %s\n", flag.Shorthand, flag.ShorthandDeprecated) + _, _ = fmt.Fprintf(f.Output(), "Flag shorthand -%s has been deprecated, %s\n", flag.Shorthand, flag.ShorthandDeprecated) } - err = fn(flag, value) + err = fn(flag, flag.Name, value) if err != nil { - f.fail(err) + err = f.fail(err) } return } @@ -1116,14 +1221,31 @@ func (f *FlagSet) parseSingleShortArg(shorthands string, args []string, fn parse func (f *FlagSet) parseShortArg(s string, args []string, fn parseFunc) (a []string, err error) { a = args shorthands := s[1:] + var errUnknownFlagAll *unknownFlagError // "shorthands" can be a series of shorthand letters of flags (e.g. "-vvv"). for len(shorthands) > 0 { shorthands, a, err = f.parseSingleShortArg(shorthands, args, fn) if err != nil { - return + if errUnknownFlag, ok := err.(*unknownFlagError); ok { //nolint:errorlint + // this means f.ParseErrorsAllowlist.UnknownFlagsHandling is set to UnknownFlagsHandlingPassUnknownToArgs + if errUnknownFlagAll == nil { + errUnknownFlagAll = &unknownFlagError{ + UnknownFlags: "-", + } + } + + errUnknownFlagAll.UnknownFlags = errUnknownFlagAll.UnknownFlags + + errUnknownFlag.UnknownFlags + err = nil + } else { + return + } } } + if errUnknownFlagAll != nil { + err = errUnknownFlagAll + } return } @@ -1153,7 +1275,13 @@ func (f *FlagSet) parseArgs(args []string, fn parseFunc) (err error) { args, err = f.parseShortArg(s, args, fn) } if err != nil { - return + if errUnknownFlag, ok := err.(*unknownFlagError); ok { //nolint:errorlint + // this means f.ParseErrorsAllowlist.UnknownFlagsHandling is set to UnknownFlagsHandlingPassUnknownToArgs + f.args = append(f.args, errUnknownFlag.UnknownFlags) + err = nil + } else { + return + } } } return @@ -1166,7 +1294,7 @@ func (f *FlagSet) parseArgs(args []string, fn parseFunc) (err error) { func (f *FlagSet) Parse(arguments []string) error { if f.addedGoFlagSets != nil { for _, goFlagSet := range f.addedGoFlagSets { - goFlagSet.Parse(nil) + _ = goFlagSet.Parse(nil) } } f.parsed = true @@ -1177,8 +1305,8 @@ func (f *FlagSet) Parse(arguments []string) error { return nil } - set := func(flag *Flag, value string) error { - return f.Set(flag.Name, value) + set := func(_ *Flag, name, value string) error { + return f.Set(name, value) } err := f.parseArgs(arguments, set) @@ -1187,10 +1315,10 @@ func (f *FlagSet) Parse(arguments []string) error { case ContinueOnError: return err case ExitOnError: - if err == ErrHelp { + if err == ErrHelp { //nolint:errorlint // not using errors.Is for compatibility with go1.12 os.Exit(0) } - fmt.Fprintln(f.Output(), err) + _, _ = fmt.Fprintln(f.Output(), err) os.Exit(2) case PanicOnError: panic(err) @@ -1199,7 +1327,7 @@ func (f *FlagSet) Parse(arguments []string) error { return nil } -type parseFunc func(flag *Flag, value string) error +type parseFunc func(flag *Flag, name, value string) error // ParseAll parses flag definitions from the argument list, which should not // include the command name. The arguments for fn are flag and value. Must be @@ -1210,16 +1338,20 @@ func (f *FlagSet) ParseAll(arguments []string, fn func(flag *Flag, value string) f.parsed = true f.args = make([]string, 0, len(arguments)) - err := f.parseArgs(arguments, fn) + set := func(flag *Flag, _, value string) error { + return fn(flag, value) + } + + err := f.parseArgs(arguments, set) if err != nil { switch f.errorHandling { case ContinueOnError: return err case ExitOnError: - if err == ErrHelp { + if err == ErrHelp { //nolint:errorlint // not using errors.Is for compatibility with go1.12 os.Exit(0) } - fmt.Fprintln(f.Output(), err) + _, _ = fmt.Fprintln(f.Output(), err) os.Exit(2) case PanicOnError: panic(err) @@ -1237,7 +1369,7 @@ func (f *FlagSet) Parsed() bool { // after all flags are defined and before flags are accessed by the program. func Parse() { // Ignore errors; CommandLine is set for ExitOnError. - CommandLine.Parse(os.Args[1:]) + _ = CommandLine.Parse(os.Args[1:]) } // ParseAll parses the command-line flags from os.Args[1:] and called fn for each. @@ -1245,7 +1377,7 @@ func Parse() { // defined and before flags are accessed by the program. func ParseAll(fn func(flag *Flag, value string) error) { // Ignore errors; CommandLine is set for ExitOnError. - CommandLine.ParseAll(os.Args[1:], fn) + _ = CommandLine.ParseAll(os.Args[1:], fn) } // SetInterspersed sets whether to support interspersed option/non-option arguments. diff --git a/vendor/github.com/spf13/pflag/float32.go b/vendor/github.com/spf13/pflag/float32.go index a243f81f..95ba4da2 100644 --- a/vendor/github.com/spf13/pflag/float32.go +++ b/vendor/github.com/spf13/pflag/float32.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- float32 Value type float32Value float32 @@ -12,8 +15,11 @@ func newFloat32Value(val float32, p *float32) *float32Value { func (f *float32Value) Set(s string) error { v, err := strconv.ParseFloat(s, 32) + if err != nil { + return errors.New("must be a number") + } *f = float32Value(v) - return err + return nil } func (f *float32Value) Type() string { diff --git a/vendor/github.com/spf13/pflag/float64.go b/vendor/github.com/spf13/pflag/float64.go index 04b5492a..67f0a1e0 100644 --- a/vendor/github.com/spf13/pflag/float64.go +++ b/vendor/github.com/spf13/pflag/float64.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- float64 Value type float64Value float64 @@ -12,8 +15,11 @@ func newFloat64Value(val float64, p *float64) *float64Value { func (f *float64Value) Set(s string) error { v, err := strconv.ParseFloat(s, 64) + if err != nil { + return errors.New("must be a number") + } *f = float64Value(v) - return err + return nil } func (f *float64Value) Type() string { diff --git a/vendor/github.com/spf13/pflag/golangflag.go b/vendor/github.com/spf13/pflag/golangflag.go index e62eab53..6e653c26 100644 --- a/vendor/github.com/spf13/pflag/golangflag.go +++ b/vendor/github.com/spf13/pflag/golangflag.go @@ -71,14 +71,14 @@ func (v *flagValueWrapper) Type() string { // If the *flag.Flag.Name was a single character (ex: `v`) it will be accessiblei // with both `-v` and `--v` in flags. If the golang flag was more than a single // character (ex: `verbose`) it will only be accessible via `--verbose` -func PFlagFromGoFlag(goflag *goflag.Flag) *Flag { +func PFlagFromGoFlag(goflag *goflag.Flag) *Flag { //nolint:revive // ignore "func name will be used as pflag.PFlagFromGoFlag by other packages, and that stutters" // Remember the default value as a string; it won't change. flag := &Flag{ Name: goflag.Name, Usage: goflag.Usage, Value: wrapFlagValue(goflag.Value), // Looks like golang flags don't set DefValue correctly :-( - //DefValue: goflag.DefValue, + // DefValue: goflag.DefValue, DefValue: goflag.Value.String(), } // Ex: if the golang flag was -v, allow both -v and --v to work @@ -127,7 +127,7 @@ func (f *FlagSet) CopyToGoFlagSet(newSet *goflag.FlagSet) { switch value := flag.Value.(type) { case *stringValue: - newSet.StringVar((*string)(value), flag.Name, flag.DefValue, usage) + newSet.StringVar((*string)(value), flag.Name, *(*string)(value), usage) case *intValue: newSet.IntVar((*int)(value), flag.Name, *(*int)(value), usage) case *int64Value: @@ -158,4 +158,3 @@ func ParseSkippedFlags(osArgs []string, goFlagSet *goflag.FlagSet) error { } return goFlagSet.Parse(skippedFlags) } - diff --git a/vendor/github.com/spf13/pflag/int.go b/vendor/github.com/spf13/pflag/int.go index 1474b89d..45e83bf6 100644 --- a/vendor/github.com/spf13/pflag/int.go +++ b/vendor/github.com/spf13/pflag/int.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- int Value type intValue int @@ -11,9 +14,12 @@ func newIntValue(val int, p *int) *intValue { } func (i *intValue) Set(s string) error { - v, err := strconv.ParseInt(s, 0, 64) + v, err := strconv.ParseInt(s, 0, 0) + if err != nil { + return errors.New("must be an integer") + } *i = intValue(v) - return err + return nil } func (i *intValue) Type() string { diff --git a/vendor/github.com/spf13/pflag/int16.go b/vendor/github.com/spf13/pflag/int16.go index f1a01d05..880bc2a7 100644 --- a/vendor/github.com/spf13/pflag/int16.go +++ b/vendor/github.com/spf13/pflag/int16.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- int16 Value type int16Value int16 @@ -12,8 +15,11 @@ func newInt16Value(val int16, p *int16) *int16Value { func (i *int16Value) Set(s string) error { v, err := strconv.ParseInt(s, 0, 16) + if err != nil { + return errors.New("must be an integer") + } *i = int16Value(v) - return err + return nil } func (i *int16Value) Type() string { diff --git a/vendor/github.com/spf13/pflag/int32.go b/vendor/github.com/spf13/pflag/int32.go index 9b95944f..2e0944d6 100644 --- a/vendor/github.com/spf13/pflag/int32.go +++ b/vendor/github.com/spf13/pflag/int32.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- int32 Value type int32Value int32 @@ -12,8 +15,11 @@ func newInt32Value(val int32, p *int32) *int32Value { func (i *int32Value) Set(s string) error { v, err := strconv.ParseInt(s, 0, 32) + if err != nil { + return errors.New("must be an integer") + } *i = int32Value(v) - return err + return nil } func (i *int32Value) Type() string { diff --git a/vendor/github.com/spf13/pflag/int64.go b/vendor/github.com/spf13/pflag/int64.go index 0026d781..2f7ae522 100644 --- a/vendor/github.com/spf13/pflag/int64.go +++ b/vendor/github.com/spf13/pflag/int64.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- int64 Value type int64Value int64 @@ -12,8 +15,11 @@ func newInt64Value(val int64, p *int64) *int64Value { func (i *int64Value) Set(s string) error { v, err := strconv.ParseInt(s, 0, 64) + if err != nil { + return errors.New("must be an integer") + } *i = int64Value(v) - return err + return nil } func (i *int64Value) Type() string { diff --git a/vendor/github.com/spf13/pflag/int8.go b/vendor/github.com/spf13/pflag/int8.go index 4da92228..91fea1a6 100644 --- a/vendor/github.com/spf13/pflag/int8.go +++ b/vendor/github.com/spf13/pflag/int8.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- int8 Value type int8Value int8 @@ -12,8 +15,11 @@ func newInt8Value(val int8, p *int8) *int8Value { func (i *int8Value) Set(s string) error { v, err := strconv.ParseInt(s, 0, 8) + if err != nil { + return errors.New("must be an integer") + } *i = int8Value(v) - return err + return nil } func (i *int8Value) Type() string { diff --git a/vendor/github.com/spf13/pflag/ip.go b/vendor/github.com/spf13/pflag/ip.go index 06b8bcb5..046f48b3 100644 --- a/vendor/github.com/spf13/pflag/ip.go +++ b/vendor/github.com/spf13/pflag/ip.go @@ -32,6 +32,9 @@ func (i *ipValue) Type() string { } func ipConv(sval string) (interface{}, error) { + if sval == "" || sval == "" { + return net.IP(nil), nil + } ip := net.ParseIP(sval) if ip != nil { return ip, nil diff --git a/vendor/github.com/spf13/pflag/ip_slice.go b/vendor/github.com/spf13/pflag/ip_slice.go index 775faae4..699f399f 100644 --- a/vendor/github.com/spf13/pflag/ip_slice.go +++ b/vendor/github.com/spf13/pflag/ip_slice.go @@ -23,13 +23,12 @@ func newIPSliceValue(val []net.IP, p *[]net.IP) *ipSliceValue { // Set converts, and assigns, the comma-separated IP argument string representation as the []net.IP value of this flag. // If Set is called on a flag that already has a []net.IP assigned, the newly converted values will be appended. func (s *ipSliceValue) Set(val string) error { - // remove all quote characters rmQuote := strings.NewReplacer(`"`, "", `'`, "", "`", "") // read flag arguments with CSV parser ipStrSlice, err := readAsCSV(rmQuote.Replace(val)) - if err != nil && err != io.EOF { + if err != nil && err != io.EOF { //nolint:errorlint // not using errors.Is for compatibility with go1.12 return err } @@ -61,7 +60,6 @@ func (s *ipSliceValue) Type() string { // String defines a "native" format for this net.IP slice flag value. func (s *ipSliceValue) String() string { - ipStrSlice := make([]string, len(*s.value)) for i, ip := range *s.value { ipStrSlice[i] = ip.String() @@ -73,7 +71,11 @@ func (s *ipSliceValue) String() string { } func (s *ipSliceValue) fromString(val string) (net.IP, error) { - return net.ParseIP(strings.TrimSpace(val)), nil + ip := net.ParseIP(strings.TrimSpace(val)) + if ip == nil { + return nil, fmt.Errorf("invalid string being converted to IP address: %s", val) + } + return ip, nil } func (s *ipSliceValue) toString(val net.IP) string { @@ -81,22 +83,22 @@ func (s *ipSliceValue) toString(val net.IP) string { } func (s *ipSliceValue) Append(val string) error { - i, err := s.fromString(val) + ip, err := s.fromString(val) if err != nil { return err } - *s.value = append(*s.value, i) + *s.value = append(*s.value, ip) return nil } func (s *ipSliceValue) Replace(val []string) error { out := make([]net.IP, len(val)) for i, d := range val { - var err error - out[i], err = s.fromString(d) + ip, err := s.fromString(d) if err != nil { return err } + out[i] = ip } *s.value = out return nil diff --git a/vendor/github.com/spf13/pflag/ipmask.go b/vendor/github.com/spf13/pflag/ipmask.go index 5bd44bd2..228d4e92 100644 --- a/vendor/github.com/spf13/pflag/ipmask.go +++ b/vendor/github.com/spf13/pflag/ipmask.go @@ -53,7 +53,11 @@ func ParseIPv4Mask(s string) net.IPMask { return nil } } - return net.IPv4Mask(mask[12], mask[13], mask[14], mask[15]) + mask = mask.To4() + if mask == nil { + return nil + } + return net.IPv4Mask(mask[0], mask[1], mask[2], mask[3]) } func parseIPv4Mask(sval string) (interface{}, error) { diff --git a/vendor/github.com/spf13/pflag/ipnet_slice.go b/vendor/github.com/spf13/pflag/ipnet_slice.go index c6e89da1..c051fbd2 100644 --- a/vendor/github.com/spf13/pflag/ipnet_slice.go +++ b/vendor/github.com/spf13/pflag/ipnet_slice.go @@ -23,13 +23,12 @@ func newIPNetSliceValue(val []net.IPNet, p *[]net.IPNet) *ipNetSliceValue { // Set converts, and assigns, the comma-separated IPNet argument string representation as the []net.IPNet value of this flag. // If Set is called on a flag that already has a []net.IPNet assigned, the newly converted values will be appended. func (s *ipNetSliceValue) Set(val string) error { - // remove all quote characters rmQuote := strings.NewReplacer(`"`, "", `'`, "", "`", "") // read flag arguments with CSV parser ipNetStrSlice, err := readAsCSV(rmQuote.Replace(val)) - if err != nil && err != io.EOF { + if err != nil && err != io.EOF { //nolint:errorlint // not using errors.Is for compatibility with go1.12 return err } @@ -61,7 +60,6 @@ func (s *ipNetSliceValue) Type() string { // String defines a "native" format for this net.IPNet slice flag value. func (s *ipNetSliceValue) String() string { - ipNetStrSlice := make([]string, len(*s.value)) for i, n := range *s.value { ipNetStrSlice[i] = n.String() diff --git a/vendor/github.com/spf13/pflag/string.go b/vendor/github.com/spf13/pflag/string.go index 04e0a26f..c96b8020 100644 --- a/vendor/github.com/spf13/pflag/string.go +++ b/vendor/github.com/spf13/pflag/string.go @@ -12,6 +12,7 @@ func (s *stringValue) Set(val string) error { *s = stringValue(val) return nil } + func (s *stringValue) Type() string { return "string" } diff --git a/vendor/github.com/spf13/pflag/string_array.go b/vendor/github.com/spf13/pflag/string_array.go index d1ff0a96..2404407f 100644 --- a/vendor/github.com/spf13/pflag/string_array.go +++ b/vendor/github.com/spf13/pflag/string_array.go @@ -30,18 +30,14 @@ func (s *stringArrayValue) Append(val string) error { func (s *stringArrayValue) Replace(val []string) error { out := make([]string, len(val)) - for i, d := range val { - out[i] = d - } + copy(out, val) *s.value = out return nil } func (s *stringArrayValue) GetSlice() []string { out := make([]string, len(*s.value)) - for i, d := range *s.value { - out[i] = d - } + copy(out, *s.value) return out } diff --git a/vendor/github.com/spf13/pflag/string_slice.go b/vendor/github.com/spf13/pflag/string_slice.go index 3cb2e69d..d421887e 100644 --- a/vendor/github.com/spf13/pflag/string_slice.go +++ b/vendor/github.com/spf13/pflag/string_slice.go @@ -98,9 +98,12 @@ func (f *FlagSet) GetStringSlice(name string) ([]string, error) { // The argument p points to a []string variable in which to store the value of the flag. // Compared to StringArray flags, StringSlice flags take comma-separated value as arguments and split them accordingly. // For example: -// --ss="v1,v2" --ss="v3" +// +// --ss="v1,v2" --ss="v3" +// // will result in -// []string{"v1", "v2", "v3"} +// +// []string{"v1", "v2", "v3"} func (f *FlagSet) StringSliceVar(p *[]string, name string, value []string, usage string) { f.VarP(newStringSliceValue(value, p), name, "", usage) } @@ -114,9 +117,12 @@ func (f *FlagSet) StringSliceVarP(p *[]string, name, shorthand string, value []s // The argument p points to a []string variable in which to store the value of the flag. // Compared to StringArray flags, StringSlice flags take comma-separated value as arguments and split them accordingly. // For example: -// --ss="v1,v2" --ss="v3" +// +// --ss="v1,v2" --ss="v3" +// // will result in -// []string{"v1", "v2", "v3"} +// +// []string{"v1", "v2", "v3"} func StringSliceVar(p *[]string, name string, value []string, usage string) { CommandLine.VarP(newStringSliceValue(value, p), name, "", usage) } @@ -130,9 +136,12 @@ func StringSliceVarP(p *[]string, name, shorthand string, value []string, usage // The return value is the address of a []string variable that stores the value of the flag. // Compared to StringArray flags, StringSlice flags take comma-separated value as arguments and split them accordingly. // For example: -// --ss="v1,v2" --ss="v3" +// +// --ss="v1,v2" --ss="v3" +// // will result in -// []string{"v1", "v2", "v3"} +// +// []string{"v1", "v2", "v3"} func (f *FlagSet) StringSlice(name string, value []string, usage string) *[]string { p := []string{} f.StringSliceVarP(&p, name, "", value, usage) @@ -150,9 +159,12 @@ func (f *FlagSet) StringSliceP(name, shorthand string, value []string, usage str // The return value is the address of a []string variable that stores the value of the flag. // Compared to StringArray flags, StringSlice flags take comma-separated value as arguments and split them accordingly. // For example: -// --ss="v1,v2" --ss="v3" +// +// --ss="v1,v2" --ss="v3" +// // will result in -// []string{"v1", "v2", "v3"} +// +// []string{"v1", "v2", "v3"} func StringSlice(name string, value []string, usage string) *[]string { return CommandLine.StringSliceP(name, "", value, usage) } diff --git a/vendor/github.com/spf13/pflag/string_to_string.go b/vendor/github.com/spf13/pflag/string_to_string.go index 1d1e3bf9..87bfe678 100644 --- a/vendor/github.com/spf13/pflag/string_to_string.go +++ b/vendor/github.com/spf13/pflag/string_to_string.go @@ -4,6 +4,7 @@ import ( "bytes" "encoding/csv" "fmt" + "io" "sort" "strings" ) @@ -21,7 +22,7 @@ func newStringToStringValue(val map[string]string, p *map[string]string) *string return ssv } -// Format: a=1,b=2 +// Set updates the flag value from the given string, adding additional mappings or updating existing ones. func (s *stringToStringValue) Set(val string) error { var ss []string n := strings.Count(val, "=") @@ -37,6 +38,9 @@ func (s *stringToStringValue) Set(val string) error { if err != nil { return err } + if _, err := r.Read(); err != io.EOF { + return fmt.Errorf("must be a single CSV record; quote fields containing newlines") + } } out := make(map[string]string, len(ss)) @@ -47,13 +51,20 @@ func (s *stringToStringValue) Set(val string) error { } out[kv[0]] = kv[1] } + + // clear out any default flag values if !s.changed { - *s.value = out - } else { - for k, v := range out { - (*s.value)[k] = v + for k := range *s.value { + delete(*s.value, k) } } + + if *s.value == nil { + *s.value = make(map[string]string, len(out)) + } + for k, v := range out { + (*s.value)[k] = v + } s.changed = true return nil } @@ -81,88 +92,113 @@ func (s *stringToStringValue) String() string { panic(err) } w.Flush() - return "[" + strings.TrimSpace(buf.String()) + "]" + return "[" + strings.TrimSuffix(buf.String(), "\n") + "]" } -func stringToStringConv(val string) (interface{}, error) { - val = strings.Trim(val, "[]") - // An empty string would cause an empty map - if len(val) == 0 { - return map[string]string{}, nil - } - r := csv.NewReader(strings.NewReader(val)) - ss, err := r.Read() - if err != nil { - return nil, err - } - out := make(map[string]string, len(ss)) - for _, pair := range ss { - kv := strings.SplitN(pair, "=", 2) - if len(kv) != 2 { - return nil, fmt.Errorf("%s must be formatted as key=value", pair) - } - out[kv[0]] = kv[1] - } - return out, nil -} - -// GetStringToString return the map[string]string value of a flag with the given name +// GetStringToString return the map value of a flag with the given name from f. The returned map shares memory with the +// internal flag value [Flag.Value]. func (f *FlagSet) GetStringToString(name string) (map[string]string, error) { - val, err := f.getFlagType(name, "stringToString", stringToStringConv) + val, err := f.getFlagType(name, "stringToString", nil) if err != nil { return map[string]string{}, err } - return val.(map[string]string), nil -} - -// StringToStringVar defines a string flag with specified name, default value, and usage string. -// The argument p points to a map[string]string variable in which to store the values of the multiple flags. -// The value of each argument will not try to be separated by comma -func (f *FlagSet) StringToStringVar(p *map[string]string, name string, value map[string]string, usage string) { - f.VarP(newStringToStringValue(value, p), name, "", usage) -} - -// StringToStringVarP is like StringToStringVar, but accepts a shorthand letter that can be used after a single dash. -func (f *FlagSet) StringToStringVarP(p *map[string]string, name, shorthand string, value map[string]string, usage string) { - f.VarP(newStringToStringValue(value, p), name, shorthand, usage) -} -// StringToStringVar defines a string flag with specified name, default value, and usage string. -// The argument p points to a map[string]string variable in which to store the value of the flag. -// The value of each argument will not try to be separated by comma -func StringToStringVar(p *map[string]string, name string, value map[string]string, usage string) { - CommandLine.VarP(newStringToStringValue(value, p), name, "", usage) -} + fv, ok := val.(*stringToStringValue) + if !ok { + panic(fmt.Errorf("illegal state: unspected internal type for stringToString flag '%s'", name)) + } + if fv.value == nil { + return nil, nil + } -// StringToStringVarP is like StringToStringVar, but accepts a shorthand letter that can be used after a single dash. -func StringToStringVarP(p *map[string]string, name, shorthand string, value map[string]string, usage string) { - CommandLine.VarP(newStringToStringValue(value, p), name, shorthand, usage) + return *fv.value, nil } -// StringToString defines a string flag with specified name, default value, and usage string. -// The return value is the address of a map[string]string variable that stores the value of the flag. -// The value of each argument will not try to be separated by comma +// StringToString defines a map flag with specified name, default value, and usage string. +// +// StringToString flags are used to pass key=value pairs to applications. The same flag can be provided more than once +// with all key=value pairs being merged into a final map. Multiple key=value pairs may be provided in a single arg, +// separated by commas. A few simple examples include: +// +// --arg a=1 -> map[string]string{ "a": "1" } +// --arg a=1 --arg b=2 -> map[string]string{ "a": "1", "b": "2" } +// --arg a=1,b=2 -> map[string]string{ "a": "1", "b": "2" } +// --arg=a=1 -> map[string]string{ "a": "1" } +// +// As a special case, a single key=value pair whose value contains a comma will be interpreted as shown below: +// +// --arg a=1,2 -> map[string]string{ "a": "1,2" } +// +// Arguments containing multiple '=' characters are parsed as one CSV record. +// Quote the entire key=value field to preserve commas, quotes, or newlines in +// its value. When invoking a command from a shell, preserve the CSV quotes, +// for example by enclosing the argument in single quotes: +// +// --arg '"a=first,second=value"' -> map[string]string{ "a": "first,second=value" } +// +// Multiple unquoted CSV records in one argument are rejected rather than +// silently discarding mappings after the first record. +// +// Returns a pointer to the map which will be updated upon invocation of [FlagSet.Parse], [Flag.Value.Set], and others. func (f *FlagSet) StringToString(name string, value map[string]string, usage string) *map[string]string { p := map[string]string{} f.StringToStringVarP(&p, name, "", value, usage) return &p } -// StringToStringP is like StringToString, but accepts a shorthand letter that can be used after a single dash. +// StringToStringP is like [FlagSet.StringToString], but also accepts a shorthand letter that can be used after a single +// dash. +// +// See [FlagSet.StringToString]. func (f *FlagSet) StringToStringP(name, shorthand string, value map[string]string, usage string) *map[string]string { p := map[string]string{} f.StringToStringVarP(&p, name, shorthand, value, usage) return &p } +// StringToStringVar is like [FlagSet.StringToString], but also accepts a map pointer argument p which is updated with +// the parsed key-value pairs. +// +// See [FlagSet.StringToString]. +func (f *FlagSet) StringToStringVar(p *map[string]string, name string, value map[string]string, usage string) { + f.VarP(newStringToStringValue(value, p), name, "", usage) +} + +// StringToStringVarP is like [FlagSet.StringToString], but also accepts a map pointer argument p which is updated with +// the parsed key-value pairs, and a shorthand letter that can be used after a single dash. +// +// See [FlagSet.StringToString]. +func (f *FlagSet) StringToStringVarP(p *map[string]string, name, shorthand string, value map[string]string, usage string) { + f.VarP(newStringToStringValue(value, p), name, shorthand, usage) +} + // StringToString defines a string flag with specified name, default value, and usage string. -// The return value is the address of a map[string]string variable that stores the value of the flag. -// The value of each argument will not try to be separated by comma +// +// See [FlagSet.StringToString]. func StringToString(name string, value map[string]string, usage string) *map[string]string { return CommandLine.StringToStringP(name, "", value, usage) } -// StringToStringP is like StringToString, but accepts a shorthand letter that can be used after a single dash. +// StringToStringP is like [FlagSet.StringToString], but also accepts a shorthand letter that can be used after a single +// dash. +// +// See [FlagSet.StringToString]. func StringToStringP(name, shorthand string, value map[string]string, usage string) *map[string]string { return CommandLine.StringToStringP(name, shorthand, value, usage) } + +// StringToStringVar is like [FlagSet.StringToString], but also accepts a map pointer argument p which is updated with +// the parsed key-value pairs. +// +// See [FlagSet.StringToString]. +func StringToStringVar(p *map[string]string, name string, value map[string]string, usage string) { + CommandLine.VarP(newStringToStringValue(value, p), name, "", usage) +} + +// StringToStringVarP is like [FlagSet.StringToString], but also accepts a map pointer argument p which is updated with +// the parsed key-value pairs, and a shorthand letter that can be used after a single dash. +// +// See [FlagSet.StringToString]. +func StringToStringVarP(p *map[string]string, name, shorthand string, value map[string]string, usage string) { + CommandLine.VarP(newStringToStringValue(value, p), name, shorthand, usage) +} diff --git a/vendor/github.com/spf13/pflag/text.go b/vendor/github.com/spf13/pflag/text.go index 886d5a3d..834bbaf6 100644 --- a/vendor/github.com/spf13/pflag/text.go +++ b/vendor/github.com/spf13/pflag/text.go @@ -42,10 +42,9 @@ func (v textValue) String() string { return "" } -//end of copy - +// end of copy func (v textValue) Type() string { - return reflect.ValueOf(v.p).Type().Name() + return reflect.TypeOf(v.p).String() } // GetText set out, which implements encoding.UnmarshalText, to the value of a flag with given name @@ -54,8 +53,8 @@ func (f *FlagSet) GetText(name string, out encoding.TextUnmarshaler) error { if flag == nil { return fmt.Errorf("flag accessed but not defined: %s", name) } - if flag.Value.Type() != reflect.TypeOf(out).Name() { - return fmt.Errorf("trying to get %s value of flag of type %s", reflect.TypeOf(out).Name(), flag.Value.Type()) + if flag.Value.Type() != reflect.TypeOf(out).String() { + return fmt.Errorf("trying to get %s value of flag of type %s", reflect.TypeOf(out).String(), flag.Value.Type()) } return out.UnmarshalText([]byte(flag.Value.String())) } diff --git a/vendor/github.com/spf13/pflag/time.go b/vendor/github.com/spf13/pflag/time.go index 3dee4247..fe457dea 100644 --- a/vendor/github.com/spf13/pflag/time.go +++ b/vendor/github.com/spf13/pflag/time.go @@ -51,9 +51,8 @@ func (d *timeValue) Type() string { func (d *timeValue) String() string { if d.Time.IsZero() { return "" - } else { - return d.Time.Format(time.RFC3339Nano) } + return d.Time.Format(time.RFC3339Nano) } // GetTime return the time value of a flag with the given name diff --git a/vendor/github.com/spf13/pflag/uint.go b/vendor/github.com/spf13/pflag/uint.go index dcbc2b75..802df0b6 100644 --- a/vendor/github.com/spf13/pflag/uint.go +++ b/vendor/github.com/spf13/pflag/uint.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- uint Value type uintValue uint @@ -11,9 +14,12 @@ func newUintValue(val uint, p *uint) *uintValue { } func (i *uintValue) Set(s string) error { - v, err := strconv.ParseUint(s, 0, 64) + v, err := strconv.ParseUint(s, 0, 0) + if err != nil { + return errors.New("must be a non-negative integer") + } *i = uintValue(v) - return err + return nil } func (i *uintValue) Type() string { diff --git a/vendor/github.com/spf13/pflag/uint16.go b/vendor/github.com/spf13/pflag/uint16.go index 7e9914ed..b086a368 100644 --- a/vendor/github.com/spf13/pflag/uint16.go +++ b/vendor/github.com/spf13/pflag/uint16.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- uint16 value type uint16Value uint16 @@ -12,8 +15,11 @@ func newUint16Value(val uint16, p *uint16) *uint16Value { func (i *uint16Value) Set(s string) error { v, err := strconv.ParseUint(s, 0, 16) + if err != nil { + return errors.New("must be a non-negative integer") + } *i = uint16Value(v) - return err + return nil } func (i *uint16Value) Type() string { diff --git a/vendor/github.com/spf13/pflag/uint32.go b/vendor/github.com/spf13/pflag/uint32.go index d8024539..ae56168d 100644 --- a/vendor/github.com/spf13/pflag/uint32.go +++ b/vendor/github.com/spf13/pflag/uint32.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- uint32 value type uint32Value uint32 @@ -12,8 +15,11 @@ func newUint32Value(val uint32, p *uint32) *uint32Value { func (i *uint32Value) Set(s string) error { v, err := strconv.ParseUint(s, 0, 32) + if err != nil { + return errors.New("must be a non-negative integer") + } *i = uint32Value(v) - return err + return nil } func (i *uint32Value) Type() string { diff --git a/vendor/github.com/spf13/pflag/uint64.go b/vendor/github.com/spf13/pflag/uint64.go index f62240f2..ffbdc072 100644 --- a/vendor/github.com/spf13/pflag/uint64.go +++ b/vendor/github.com/spf13/pflag/uint64.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- uint64 Value type uint64Value uint64 @@ -12,8 +15,11 @@ func newUint64Value(val uint64, p *uint64) *uint64Value { func (i *uint64Value) Set(s string) error { v, err := strconv.ParseUint(s, 0, 64) + if err != nil { + return errors.New("must be a non-negative integer") + } *i = uint64Value(v) - return err + return nil } func (i *uint64Value) Type() string { @@ -27,7 +33,7 @@ func uint64Conv(sval string) (interface{}, error) { if err != nil { return 0, err } - return uint64(v), nil + return v, nil } // GetUint64 return the uint64 value of a flag with the given name diff --git a/vendor/github.com/spf13/pflag/uint8.go b/vendor/github.com/spf13/pflag/uint8.go index bb0e83c1..bca63f67 100644 --- a/vendor/github.com/spf13/pflag/uint8.go +++ b/vendor/github.com/spf13/pflag/uint8.go @@ -1,6 +1,9 @@ package pflag -import "strconv" +import ( + "errors" + "strconv" +) // -- uint8 Value type uint8Value uint8 @@ -12,8 +15,11 @@ func newUint8Value(val uint8, p *uint8) *uint8Value { func (i *uint8Value) Set(s string) error { v, err := strconv.ParseUint(s, 0, 8) + if err != nil { + return errors.New("must be a non-negative integer") + } *i = uint8Value(v) - return err + return nil } func (i *uint8Value) Type() string { diff --git a/vendor/github.com/spf13/pflag/uint_slice.go b/vendor/github.com/spf13/pflag/uint_slice.go index 5fa92483..d38e124e 100644 --- a/vendor/github.com/spf13/pflag/uint_slice.go +++ b/vendor/github.com/spf13/pflag/uint_slice.go @@ -23,7 +23,7 @@ func (s *uintSliceValue) Set(val string) error { ss := strings.Split(val, ",") out := make([]uint, len(ss)) for i, d := range ss { - u, err := strconv.ParseUint(d, 10, 0) + u, err := strconv.ParseUint(d, 0, 0) if err != nil { return err } @@ -51,7 +51,7 @@ func (s *uintSliceValue) String() string { } func (s *uintSliceValue) fromString(val string) (uint, error) { - t, err := strconv.ParseUint(val, 10, 0) + t, err := strconv.ParseUint(val, 0, 0) if err != nil { return 0, err } @@ -101,7 +101,7 @@ func uintSliceConv(val string) (interface{}, error) { ss := strings.Split(val, ",") out := make([]uint, len(ss)) for i, d := range ss { - u, err := strconv.ParseUint(d, 10, 0) + u, err := strconv.ParseUint(d, 0, 0) if err != nil { return nil, err } diff --git a/vendor/golang.org/x/sys/unix/syscall_unix_gc_ppc64x.go b/vendor/golang.org/x/sys/unix/syscall_unix_gc_ppc64x.go deleted file mode 100644 index 23f39b7a..00000000 --- a/vendor/golang.org/x/sys/unix/syscall_unix_gc_ppc64x.go +++ /dev/null @@ -1,22 +0,0 @@ -// Copyright 2018 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -//go:build linux && (ppc64le || ppc64) && gc - -package unix - -import "syscall" - -func Syscall(trap, a1, a2, a3 uintptr) (r1, r2 uintptr, err syscall.Errno) { - return syscall.Syscall(trap, a1, a2, a3) -} -func Syscall6(trap, a1, a2, a3, a4, a5, a6 uintptr) (r1, r2 uintptr, err syscall.Errno) { - return syscall.Syscall6(trap, a1, a2, a3, a4, a5, a6) -} -func RawSyscall(trap, a1, a2, a3 uintptr) (r1, r2 uintptr, err syscall.Errno) { - return syscall.RawSyscall(trap, a1, a2, a3) -} -func RawSyscall6(trap, a1, a2, a3, a4, a5, a6 uintptr) (r1, r2 uintptr, err syscall.Errno) { - return syscall.RawSyscall6(trap, a1, a2, a3, a4, a5, a6) -} diff --git a/vendor/golang.org/x/sys/windows/types_windows_arm.go b/vendor/golang.org/x/sys/windows/types_windows_arm.go deleted file mode 100644 index 321872c3..00000000 --- a/vendor/golang.org/x/sys/windows/types_windows_arm.go +++ /dev/null @@ -1,35 +0,0 @@ -// Copyright 2018 The Go Authors. All rights reserved. -// Use of this source code is governed by a BSD-style -// license that can be found in the LICENSE file. - -package windows - -type WSAData struct { - Version uint16 - HighVersion uint16 - Description [WSADESCRIPTION_LEN + 1]byte - SystemStatus [WSASYS_STATUS_LEN + 1]byte - MaxSockets uint16 - MaxUdpDg uint16 - VendorInfo *byte -} - -type Servent struct { - Name *byte - Aliases **byte - Port uint16 - Proto *byte -} - -type JOBOBJECT_BASIC_LIMIT_INFORMATION struct { - PerProcessUserTimeLimit int64 - PerJobUserTimeLimit int64 - LimitFlags uint32 - MinimumWorkingSetSize uintptr - MaximumWorkingSetSize uintptr - ActiveProcessLimit uint32 - Affinity uintptr - PriorityClass uint32 - SchedulingClass uint32 - _ uint32 // pad to 8 byte boundary -} diff --git a/vendor/modules.txt b/vendor/modules.txt index 185e79b3..9cea2d0d 100644 --- a/vendor/modules.txt +++ b/vendor/modules.txt @@ -223,7 +223,7 @@ github.com/spf13/cast/internal # github.com/spf13/cobra v1.10.2 ## explicit; go 1.15 github.com/spf13/cobra -# github.com/spf13/pflag v1.0.10 +# github.com/spf13/pflag v1.1.0 ## explicit; go 1.12 github.com/spf13/pflag # github.com/spf13/viper v1.21.0