diff --git a/lib/ADL/base.rb b/lib/ADL/base.rb index 4eb5910..72d8e96 100644 --- a/lib/ADL/base.rb +++ b/lib/ADL/base.rb @@ -4,25 +4,38 @@ module SimInfra # @@instructions -array of instruction description # shows result of our tests in interactive Ruby (IRB) or standalone + def self.deep_stringify(value) + case value + when Hash + value.each_with_object({}) { |(k, v), h| h[deep_stringify(k)] = deep_stringify(v) } + when Array + value.map { |v| deep_stringify(v) } + when Symbol + value.to_s + else + value + end + end + def self.serialize(msg= nil) require 'yaml' yaml_data = YAML.dump( - { - regfiles: @@regfiles.map(&:to_h), - interface_functions: @@interface_functions.map(&:to_h), - instructions: @@instructions.map(&:to_h), - } + deep_stringify({ + regfiles: @@regfiles.map(&:to_h), + interface_functions: @@interface_functions.map(&:to_h), + instructions: @@instructions.map(&:to_h), + }) ) yaml_data end def self.state yaml_data = YAML.dump( - { + deep_stringify({ regfiles: @@regfiles.map(&:to_h), interface_functions: @@interface_functions.map(&:to_h), instructions: @@instructions.map(&:to_h), - } + }) ) end diff --git a/sim_gen/sim_gen.rb b/sim_gen/sim_gen.rb index 572cf54..ecf7203 100755 --- a/sim_gen/sim_gen.rb +++ b/sim_gen/sim_gen.rb @@ -11,7 +11,17 @@ require 'yaml' -yaml_data = YAML.load_file(ARGV[0]) +def deep_symbolize(value) + case value + when Hash then value.transform_keys(&:to_sym).transform_values { |v| deep_symbolize(v) } + when Array then value.map { |v| deep_symbolize(v) } + when String then value.to_sym + else value + end +end + +yaml_data = YAML.safe_load_file(ARGV[0], aliases: true) +yaml_data = deep_symbolize(yaml_data) yaml_data[:isa_name] = "RISCV" File.write('cpu_state.hh', SimGen::CPUState::Header.generate_cpu_state(yaml_data)) diff --git a/test/SimTests/SnippetBased/SnippetBasedImpl/InitTestGen.rb b/test/SimTests/SnippetBased/SnippetBasedImpl/InitTestGen.rb index 6d1aa4a..71184c4 100644 --- a/test/SimTests/SnippetBased/SnippetBasedImpl/InitTestGen.rb +++ b/test/SimTests/SnippetBased/SnippetBasedImpl/InitTestGen.rb @@ -24,7 +24,7 @@ def generate_random_values ir[:regfiles].each do |regfile| regfile[:regs].each do |reg| attrs = reg[:attrs] || [] - next if attrs.include?(:zero) || attrs.include?(:pc) + next if attrs.include?("zero") || attrs.include?("pc") size = reg[:size] || 32 max = (1 << size) - 1 values[reg[:name]] = @rng.rand(0..max) diff --git a/test/SimTests/SnippetBased/SnippetBasedImpl/Target/RISCV/Formatter.rb b/test/SimTests/SnippetBased/SnippetBasedImpl/Target/RISCV/Formatter.rb index 7d53a43..d66b0ba 100644 --- a/test/SimTests/SnippetBased/SnippetBasedImpl/Target/RISCV/Formatter.rb +++ b/test/SimTests/SnippetBased/SnippetBasedImpl/Target/RISCV/Formatter.rb @@ -13,7 +13,7 @@ def init_register(emitter, ir, values) ir[:regfiles].each do |regfile| regfile[:regs].each do |reg| attrs = reg[:attrs] || [] - next if attrs.include?(:zero) || attrs.include?(:pc) || reg[:name] == :x2 + next if attrs.include?("zero") || attrs.include?("pc") || reg[:name] == "x2" emitter.emit_line "li #{reg[:name]}, 0x#{values[reg[:name]].to_s(16)}" end @@ -32,7 +32,7 @@ def insert_check(emitter, ir, ref_values) ir[:regfiles].each do |regfile| regfile[:regs].each do |reg| attrs = reg[:attrs] || [] - next if attrs.include?(:zero) || attrs.include?(:pc) || reg[:name] == :x1 || reg[:name] == :x2 + next if attrs.include?("zero") || attrs.include?("pc") || reg[:name] == "x1" || reg[:name] == "x2" emitter.emit_line "li x1, 0x#{ref_values[reg[:name]].to_s(16)}" emitter.emit_line "bne x1, #{reg[:name]}, _fail"